Abstract: Systems, methods, and apparatuses relating to circuitry to implement precise last branch record event logging in a processor are described. In one embodiment, a hardware processor core includes an execution circuit to execute instructions, a retirement circuit to retire executed instructions, a status register, and a last branch record circuit to, in response to retirement by the retirement circuit of a first taken branch instruction, start a cycle timer and a performance monitoring event counter, and in response to retirement by the retirement circuit of a second taken branch instruction, that is a next taken branch instruction in program order after the first taken branch instruction, write values from the cycle timer and the performance monitoring event counter into a first entry in the status register and clear the values from the cycle timer and the performance monitoring event counter.

Abstract: Techniques for performance monitoring are described. In certain examples, an apparatus (e.g., a processor) includes an execution circuit to execute one or more instructions; a performance monitoring counter; a control register comprising a threshold field; and a performance monitor control circuit to increment the performance monitoring counter in response to a performance monitoring event of the one or more instructions being equal to, but not greater than, the threshold field.

Abstract: Systems, methods, and apparatuses relating to circuitry to implement toggle point insertion for a clustered decode pipeline are described.

Abstract: Techniques and mechanisms for determining a latency event to be represented in performance monitoring information. In an embodiment, circuit blocks of a pipeline experience respective latency events at variously times during tasks by the pipeline which service a workload. The circuit blocks send to an evaluation circuit of the pipeline respective event signals which each indicate whether a respective latency event has been detected. The event signals are communicated in parallel with at least a portion of the pipeline. In response to a trigger event in the pipeline, the evaluation circuit selects an event signal, based on relative priorities of the event signals, which provides a sample indicating a detected latency event. Based on the selected event signal, a representation of the indicated latency event in provided to latency event count or other value performance monitoring information. In another embodiment, different time delays are applied to various event signals.

Abstract: Systems, methods, and apparatuses relating to circuitry to implement scalable port-binding for asymmetric execution ports and allocation widths of a processor are described.

Abstract: Techniques for implementing instructions and modified instruction encodings for checking tags and for interspersing islands of tags in line with bucketed data for locality by a processor are described. In an example, an apparatus includes decoder circuitry and execution circuitry. The decoder circuitry is to decode an instruction into a decoded instruction. The instruction has an opcode to indicate that the execution circuitry is to use metadata and instruction encodings to selectively perform a memory safety check. The execution circuitry is to execute the decoded instruction according to the opcode.

Abstract: Techniques and mechanisms for providing branch prediction information to facilitate instruction decoding by a processor. In an embodiment, entries of a branch prediction table (BTB) each identify, for a corresponding instruction, whether a prediction based on the instruction (if any) is eligible to be communicated, with another prediction, in a single fetch cycle. A branch prediction unit of the processor determines a linear address of a fetch region which is under consideration, and performs a search of the BTB based on the linear address. A result of the search is evaluated to detect for any hit entry which indicates a double prediction eligibility. In another embodiment, where it is determined that double prediction eligibility is indicated for an earliest one the instructions represented by the hit entries, multiple predictions are communicated in a single fetch cycle.

Abstract: Provided herein are methods for increasing the yield of an extracellular product synthesized by an organism cultured in a continuous aerobic fermentation system. The extracellular product yield is increased through the use of an organism modified to decreased production of polyhydroxyalkanoate, to increase production of the extracellular product, and to include promoters that can be inducible in response to nutrient limitation conditions. The extracellular product yield is also increased by operating the continuous fermentation system under particular nutrient limitation conditions. Also provided are non-naturally occurring organisms that have been modified for use with the provided methods, and extracellular products made using the provided methods.

Abstract: Systems, methods, and apparatuses relating to circuitry to implement out-of-order access to a shared microcode sequencer by a clustered decode pipeline are described.

Abstract: In one embodiment, an apparatus comprises: a branch prediction circuit to predict whether a branch is to be taken; a fetch circuit, in a single fetch cycle, to send a first portion of a fetch region of instructions to a first decode cluster and send a second portion of the fetch region to the second decode cluster; the first decode cluster comprising a first plurality of decode circuits to decode one or more instructions in the first portion of the fetch region; and the second decode cluster comprising a second plurality of decode circuits to decode one or more other instructions in the second portion of the fetch region. Other embodiments are described and claimed.

Abstract: In one embodiment, an apparatus includes: at least one core to execute instructions; and a plurality of fixed counters coupled to the at least one core, the plurality of fixed counters to count events during execution on the at least one core, at least some of the plurality of fixed counters to count event information of a highest level of a hierarchical performance monitoring organization. Other embodiments are described and claimed.

Abstract: An embodiment of an integrated circuit may comprise a core and an instruction decoder communicatively coupled to the core to decode one or more instructions for execution by the core, where the instruction decoder includes two or more decode clusters in a parallel arrangement, and circuitry to offline a decode cluster of the two or more decode clusters. Other embodiments are disclosed and claimed.

Abstract: Systems, methods, and apparatuses relating to circuitry to implement toggle point insertion for a clustered decode pipeline are described.

Abstract: Techniques and mechanisms for providing branch prediction information to facilitate instruction decoding by a processor. In an embodiment, entries of a branch prediction table (BTB) each identify, for a corresponding instruction, whether a prediction based on the instruction (if any) is eligible to be communicated, with another prediction, in a single fetch cycle. A branch prediction unit of the processor determines a linear address of a fetch region which is under consideration, and performs a search of the BTB based on the linear address. A result of the search is evaluated to detect for any hit entry which indicates a double prediction eligibility. In another embodiment, where it is determined that double prediction eligibility is indicated for an earliest one the instructions represented by the hit entries, multiple predictions are communicated in a single fetch cycle.

Abstract: This disclosure relates to genome-scale attenuation or knockout strategies for directing carbon flux to certain carbon based building blocks within the 7-aminoheptanoic acid (7-AHA) and 6-aminohexanoic acid (6-AHA) biosynthesis pathways, for example, to achieve reduced flux to unwanted side products while achieving increased production of desired intermediates and end products. This disclosure also relates to non-naturally occurring mutant bacterial strains comprising one or more gene disruptions in aldehyde reductase and/or aldehyde dehydrogenase genes that are generated to direct carbon flux to certain carbon based building blocks. This disclosure further relates to a method for enhancing production of carbon based building blocks by generating non-naturally occurring mutant bacterial strains, culturing said mutant bacterial strains in the presence of suitable substrates or under desired growth conditions, and substantially purifying the desired end product.

Abstract: Techniques and mechanisms for determining a latency event to be represented in performance monitoring information. In an embodiment, circuit blocks of a pipeline experience respective latency events at variously times during tasks by the pipeline which service a workload. The circuit blocks send to an evaluation circuit of the pipeline respective event signals which each indicate whether a respective latency event has been detected. The event signals are communicated in parallel with at least a portion of the pipeline. In response to a trigger event in the pipeline, the evaluation circuit selects an event signal, based on relative priorities of the event signals, which provides a sample indicating a detected latency event. Based on the selected event signal, a representation of the indicated latency event in provided to latency event count or other value performance monitoring information. In another embodiment, different time delays are applied to various event signals.

Abstract: Techniques and mechanisms for determining a latency event to be represented in performance monitoring information. In an embodiment, circuit blocks of a pipeline experience respective latency events at variously times during tasks by the pipeline which service a workload. The circuit blocks send to an evaluation circuit of the pipeline respective event signals which each indicate whether a respective latency event has been detected. The event signals are communicated in parallel with at least a portion of the pipeline. In response to a trigger event in the pipeline, the evaluation circuit selects an event signal, based on relative priorities of the event signals, which provides a sample indicating a detected latency event. Based on the selected event signal, a representation of the indicated latency event in provided to latency event count or other value performance monitoring information. In another embodiment, different time delays are applied to various event signals.

Abstract: Provided herein are methods for increasing the yield of an extracellular product synthesized by an organism cultured in a continuous aerobic fermentation system. The extracellular product yield is increased through the use of an organism modified to decreased production of polyhydroxyalkanoate, to increase production of the extracellular product, and to include promoters that can be inducible in response to nutrient limitation conditions. The extracellular product yield is also increased by operating the continuous fermentation system under particular nutrient limitation conditions. Also provided are non-naturally occurring organisms that have been modified for use with the provided methods, and extracellular products made using the provided methods.

Abstract: Techniques and mechanisms for determining a latency event to be represented in performance monitoring information. In an embodiment, circuit blocks of a pipeline experience respective latency events at variously times during tasks by the pipeline which service a workload. The circuit blocks send to an evaluation circuit of the pipeline respective event signals which each indicate whether a respective latency event has been detected. The event signals are communicated in parallel with at least a portion of the pipeline. In response to a trigger event in the pipeline, the evaluation circuit selects an event signal, based on relative priorities of the event signals, which provides a sample indicating a detected latency event. Based on the selected event signal, a representation of the indicated latency event in provided to latency event count or other value performance monitoring information. In another embodiment, different time delays are applied to various event signals.

Abstract: This disclosure relates to genome-scale attenuation or knockout strategies for directing carbon flux to certain carbon based building blocks within the 7-aminoheptanoic acid (7-AHA) and 6-aminohexanoic acid (6-AHA) biosynthesis pathways, for example, to achieve reduced flux to unwanted side products while achieving increased production of desired intermediates and end products. This disclosure also relates to non-naturally occurring mutant bacterial strains comprising one or more gene disruptions in aldehyde reductase and/or aldehyde dehydrogenase genes that are generated to direct carbon flux to certain carbon based building blocks. This disclosure further relates to a method for enhancing production of carbon based building blocks by generating non-naturally occurring mutant bacterial strains, culturing said mutant bacterial strains in the presence of suitable substrates or under desired growth conditions, and substantially purifying the desired end product.