Abstract: One example includes a superconducting circuit chip. The chip includes superconducting circuitry that operates based on a clock signal. The chip also includes a ring oscillator configured to receive a synchronization signal from a ring oscillator associated with another superconducting circuit chip. The ring oscillator is also configured to provide a trigger signal to the superconducting circuitry at a given phase of the clock signal relative to a phase of the clock signal of a trigger signal associated with the other one of the superconducting circuit chips based on the synchronization signal.

Abstract: One example includes a superconducting circuit chip. The chip includes superconducting circuitry that operates based on a clock signal. The chip also includes a ring oscillator configured to receive a synchronization signal from a ring oscillator associated with another superconducting circuit chip. The ring oscillator is also configured to provide a trigger signal to the superconducting circuitry at a given phase of the clock signal relative to a phase of the clock signal of a trigger signal associated with the other one of the superconducting circuit chips based on the synchronization signal.

Abstract: Embodiments of the present disclosure relate generally to testing one or more signal paths. For example, a signal path may include a phase shifter that may impart a phase shift to signals passing through the signal path. Some embodiments may test a phase shift imparted to a signal by the signal path, including the phase shifter. Some embodiments may test the phase shift by comparing the phase of a signal at an input of the signal path with the phase of a signal at the output of the signal path. Some embodiments may test the phase shift by providing a signal at inputs of two phase paths and comparing the phases of signals at the outputs of the signal paths. Some embodiments may further adjust a phase shifter responsive to the test. Related devices, systems and methods are also disclosed.

Abstract: Superconducting output amplifiers (OAs) including compound direct current-superconducting quantum interference devices (DC-SQUIDs) having both inputs driven by an input signal having the same phase and related methods are described. An example superconducting OA includes: (1) a first compound DC-SQUID having a first DC-SQUID and a second DC-SQUID, and (2) a second compound DC-SQUID having a third DC-SQUID and a fourth DC-SQUID. The superconducting OA includes a first driver configured to receive a single flux quantum (SFQ) pulse train and amplify a first set of SFQ pulses associated with the SFQ pulse train to generate a first signal for driving the first DC-SQUID and the second DC-SQUID. The superconducting OA further includes a second driver configured to receive the SFQ pulse train and amplify a second set of SFQ pulses associated with the SFQ pulse train to generate a second signal for driving the third DC-SQUID and the fourth DC-SQUID.

Abstract: Superconducting output amplifiers with interstage filters and related methods are described. An example superconducting output amplifier includes a first superconducting output amplifier stage and a second superconducting output amplifier stage. The superconducting output amplifier may further include a first terminal for receiving a first single flux quantum (SFQ) pulse train and coupling the SFQ pulse train to each of the first superconducting output amplifier stage and the second superconducting output amplifier stage. The superconducting output amplifier may further include an interstage filter comprising a damped Josephson junction (JJ) coupled between the first superconducting output amplifier stage and the second superconducting output amplifier stage, where the interstage filter is arranged to reduce distortion in an output voltage waveform generated by the superconducting output amplifier in response to at least the first SFQ pulse train.

Abstract: Superconducting output amplifiers (OAs) including compound direct current-superconducting quantum interference devices (DC-SQUIDS) having both inputs driven by an input signal having the same phase and related methods are described. An example superconducting OA includes: (1) a first compound DC-SQUID having a first DC-SQUID and a second DC-SQUID, and (2) a second compound DC-SQUID having a third DC-SQUID and a fourth DC-SQUID. The superconducting OA includes a first driver configured to receive a single flux quantum (SFQ) pulse train and amplify a first set of SFQ pulses associated with the SFQ pulse train to generate a first signal for driving the first DC-SQUID and the second DC-SQUID. The superconducting OA further includes a second driver configured to receive the SFQ pulse train and amplify a second set of SFQ pulses associated with the SFQ pulse train to generate a second signal for driving the third DC-SQUID and the fourth DC-SQUID.

Abstract: Superconducting output amplifiers with interstage filters and related methods are described. An example superconducting output amplifier includes a first superconducting output amplifier stage and a second superconducting output amplifier stage. The superconducting output amplifier may further include a first terminal for receiving a first single flux quantum (SFQ) pulse train and coupling the SFQ pulse train to each of the first superconducting output amplifier stage and the second superconducting output amplifier stage. The superconducting output amplifier may further include an interstage filter comprising a damped Josephson junction (JJ) coupled between the first superconducting output amplifier stage and the second superconducting output amplifier stage, where the interstage filter is arranged to reduce distortion in an output voltage waveform generated by the superconducting output amplifier in response to at least the first SFQ pulse train.

Abstract: One example includes a superconducting clock conditioning system. The system includes a plurality of inductive stages. Each of the plurality of inductive stages includes an inductive signal path that includes at least one inductor and a Josephson junction. The superconducting clock conditioning system is configured to receive an input AC clock signal and to output a conditioned AC clock signal having an approximately square-wave characteristic and having a peak amplitude that is less than a peak amplitude of the input AC clock signal.

Abstract: One example includes a superconducting clock conditioning system. The system includes a plurality of inductive stages. Each of the plurality of inductive stages includes an inductive signal path that includes at least one inductor and a Josephson junction. The superconducting clock conditioning system is configured to receive an input AC clock signal and to output a conditioned AC clock signal having an approximately square-wave characteristic and having a peak amplitude that is less than a peak amplitude of the input AC clock signal.

Abstract: Superconducting circuits for processing input signals are described. An example superconducting circuit includes a first portion configured to receive an input signal having a data pattern represented by edge transitions in the input signal. The superconducting circuit further includes a second portion configured to provide an output signal, where the superconducting circuit is configured to, without applying a direct-current (DC) offset to the input signal, output the output signal corresponding to the edge transitions such that the output signal is substantially representative of the data pattern despite not applying the DC offset to the input signal.

Abstract: Superconducting circuits for processing input signals are described. An example superconducting circuit includes a first portion configured to receive an input signal having a data pattern represented by edge transitions in the input signal. The superconducting circuit further includes a second portion configured to provide an output signal, where the superconducting circuit is configured to, without applying a direct-current (DC) offset to the input signal, output the output signal corresponding to the edge transitions such that the output signal is substantially representative of the data pattern despite not applying the DC offset to the input signal.

Abstract: Output amplifier comprising a stack of compound superconducting quantum interference device (SQUID) output amplifier stages and related methods are provided. A method includes receiving a first pulse train comprising a first plurality of single flux quantum (SFQ) pulses. The method may further include receiving a second pulse train comprising a second plurality of SFQ pulses, where the second pulse train is delayed by a predetermined fraction of a clock cycle relative to the first pulse train. The method may further include using the stack of the plurality of compound SQUID output amplifier stages converting the first plurality of SFQ pulses and the second plurality of SFQ pulses into a voltage waveform, where each of the plurality of compound SQUID output amplifier stages comprises a pair of superconducting quantum interference devices (SQUIDs).

Abstract: One example includes a superconducting transmission line driver system. The system includes an input stage configured to receive an input pulse and an AC bias current source configured to provide an AC bias current. The system also includes an amplifier coupled to the input stage and configured to generate a plurality of sequential SFQ pulses based on the input pulse in response to the AC bias current. The system further includes a low-pass filter configured to filter the plurality of sequential SFQ pulses to generate an amplified output pulse that is output to a transmission line.

Abstract: Output amplifier comprising a stack of compound superconducting quantum interference device (SQUID) output amplifier stages and related methods are provided. A method includes receiving a first pulse train comprising a first plurality of single flux quantum (SFQ) pulses. The method may further include receiving a second pulse train comprising a second plurality of SFQ pulses, where the second pulse train is delayed by a predetermined fraction of a clock cycle relative to the first pulse train. The method may further include using the stack of the plurality of compound SQUID output amplifier stages converting the first plurality of SFQ pulses and the second plurality of SFQ pulses into a voltage waveform, where each of the plurality of compound SQUID output amplifier stages comprises a pair of superconducting quantum interference devices (SQUIDs).

Abstract: One example includes a superconducting transmission driver system. The system includes a latching gate stage comprising at least one Josephson junction configured to switch from an off state to an oscillating voltage state to provide an oscillating voltage at a control node in response to a single flux quantum (SFQ) pulse received at an input. The system further includes a low-pass filter stage coupled to the control node and configured to convert the oscillating voltage to a pulse signal to be transmitted over a transmission line.

Abstract: A phase shifter, including two superconducting circuits, is provided. Each of the superconducting circuits includes at least one capacitor coupled in parallel to at least a Josephson junction and at least one inductor, where a respective inductance of each of the Josephson junctions (e.g., a first Josephson junction and a second Josephson junction) is a function of at least a current flow through each of the respective inductors. An effect of any or both of: (1) at least the inductance of the at least the first Josephson junction and (2) at least the inductance of the at least the second Josephson junction causes a phase change of a radio frequency signal received at a first terminal of the phase shifter to generate a phase-shifted radio frequency signal at a second terminal of the phase shifter.

Abstract: One example includes a superconducting transmission driver system. The system includes a latching gate stage comprising at least one Josephson junction configured to switch from an off state to an oscillating voltage state to provide an oscillating voltage at a control node in response to a single flux quantum (SFQ) pulse received at an input. The system further includes a low-pass filter stage coupled to the control node and configured to convert the oscillating voltage to a pulse signal to be transmitted over a transmission line.

Abstract: A phase shifter, including two superconducting circuits, is provided. Each of the superconducting circuits includes at least one capacitor coupled in parallel to at least a Josephson junction and at least one inductor, where a respective inductance of each of the Josephson junctions (e.g., a first Josephson junction and a second Josephson junction) is a function of at least a current flow through each of the respective inductors. An effect of any or both of: (1) at least the inductance of the at least the first Josephson junction and (2) at least the inductance of the at least the second Josephson junction causes a phase change of a radio frequency signal received at a first terminal of the phase shifter to generate a phase-shifted radio frequency signal at a second terminal of the phase shifter.

Abstract: The present invention provides systems and methods for measuring signal phase shift caused by changes in fiber length.

Abstract: The present invention provides systems and methods for measuring signal phase shift caused by changes in fiber length.