Patents by Inventor Jonathan E. Macro

Jonathan E. Macro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • High density trench isolation for MOS circuits
    Patent number: 5179038
    Abstract: A method of forming isolation trenches in CMOS integrated circuits is disclosed. The trench side walls are covered by a thin oxide layer, and the trenches are filled with a highly doped polysilicon. The doped polysilicon has a high work function which prevents oxide charges from inverting the trench side walls and thereby turns off the parasitic transistors at these side walls to reduce latchup.
    Type: Grant
    Filed: December 22, 1989
    Date of Patent: January 12, 1993
    Assignee: North American Philips Corp., Signetics Division
    Inventors: Wayne I. Kinney, John P. Niemi, Jonathan E. Macro, David Back