Patents by Inventor Jonathan F. Gorrell

Jonathan F. Gorrell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6811714
    Abstract: A method of manufacturing a micromachined component includes using a first liquid to etch a first layer (140) located underneath a second layer (150), exposing the second layer to a second liquid that is inorganic and miscible in carbon dioxide, and supercritical drying the micromachined component with carbon dioxide.
    Type: Grant
    Filed: October 6, 2000
    Date of Patent: November 2, 2004
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jonathan F. Gorrell, Gordana S. Nielsen
  • Patent number: 6707351
    Abstract: MEMS resonators (100, 400, 500) include a source of material that is capable of sublimation (128, 130, 406, 408, 502, 504). Conductive pathways (132, 134, 402, 404, 502, 504) to the material are used to supply current of ohmically heat the material in order to cause the material to sublimate. The material may be located either on or in close proximity to a resonant member (114) of the resonator. By sublimating the material, the mass of the resonant member is either increased or decreased thereby altering the resonant frequency of the resonant member. The resonant member is preferably located in a recess that is capped by a cap (202) forming a vacuum enclosure, and the material capable of sublimation preferably comprises a material that serves to getter any residual gases in the vacuum enclosure.
    Type: Grant
    Filed: March 27, 2002
    Date of Patent: March 16, 2004
    Assignee: Motorola, Inc.
    Inventor: Jonathan F. Gorrell
  • Patent number: 6673667
    Abstract: A method for manufacturing a monolithic apparatus including a plurality of materials presenting a plurality of coplanar lands includes the steps of: (a) providing a substrate constructed of a first material and presenting a first land; (b) trenching the substrate to effect a cavity appropriately dimensioned to receive a semiconductor structure in an orientation presenting a second land generally coplanar with the first land; (c) depositing an accommodating layer constructed of a second material on the substrate and within the cavity to establish a workpiece; (d) depositing a composition layer constructed of a third material on the substrate; (e) selectively removing portions of the composition layer and the accommodating layer to establish the semiconductor structure; (f) depositing a cap layer constructed of a fourth material on the workpiece; and (g) removing the cap layer to establish a substantially planar face displaced from the plurality of lands by a predetermined distance.
    Type: Grant
    Filed: August 15, 2001
    Date of Patent: January 6, 2004
    Assignee: Motorola, Inc.
    Inventors: Jonathan F. Gorrell, Kenneth D. Cornett
  • Publication number: 20030184412
    Abstract: MEMS resonators (100, 400, 500) include a source of material that is capable of sublimation (128, 130, 406, 408, 502, 504). Conductive pathways (132, 134, 402, 404, 502, 504) to the material are used to supply current of ohmically heat the material in order to cause the material to sublimate. The material may be located either on or in close proximity to a resonant member (114) of the resonator. By sublimating the material, the mass of the resonant member is either increased or decreased thereby altering the resonant frequency of the resonant member. The resonant member is preferably located in a recess that is capped by a cap (202) forming a vacuum enclosure, and the material capable of sublimation preferably comprises a material that serves to getter any residual gases in the vacuum enclosure.
    Type: Application
    Filed: March 27, 2002
    Publication date: October 2, 2003
    Inventor: Jonathan F. Gorrell
  • Publication number: 20030034535
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials.
    Type: Application
    Filed: August 15, 2001
    Publication date: February 20, 2003
    Applicant: MOTOROLA, INC.
    Inventors: Barbara Foley Barenburg, Jonathan F. Gorrell, Kenneth D. Cornett
  • Publication number: 20030036224
    Abstract: A method for manufacturing a monolithic apparatus including a plurality of materials presenting a plurality of coplanar lands includes the steps of: (a) providing a substrate constructed of a first material and presenting a first land; (b) trenching the substrate to effect a cavity appropriately dimensioned to receive a semiconductor structure in an orientation presenting a second land generally coplanar with the first land; (c) depositing an accommodating layer constructed of a second material on the substrate and within the cavity to establish a workpiece; (d) depositing a composition layer constructed of a third material on the substrate; (e) selectively removing portions of the composition layer and the accommodating layer to establish the semiconductor structure; (f) depositing a cap layer constructed of a fourth material on the workpiece; and (g) removing the cap layer to establish a substantially planar face displaced from the plurality of lands by a predetermined distance.
    Type: Application
    Filed: August 15, 2001
    Publication date: February 20, 2003
    Applicant: MOTOROLA, INC.
    Inventors: Jonathan F. Gorrell, Kenneth D. Cornett
  • Publication number: 20030025116
    Abstract: A semiconductor laminate configured for dividing into predetermined parts has a lateral expanse and includes: (a) a monocrystalline substrate substantially coterminous with the lateral expanse; (b) at least one layer including a monocrystalline compound semiconductor material; and (c) at least one intermediate layer substantially separating the substrate and the compound semiconductor material. The at least one compound semiconductor material layer is arrayed to present intervals substantially devoid of the monocrystalline compound semiconductor material that generally establish lateral limits of the predetermined parts.
    Type: Application
    Filed: August 1, 2001
    Publication date: February 6, 2003
    Applicant: MOTOROLA, INC.
    Inventors: Robert J. Higgins, Barbara Foley Barenburg, Joseph P. Heck, Jonathan F. Gorrell
  • Publication number: 20030012925
    Abstract: Highly controlled, highly aligned monolithic integration of devices in a high quality monocrystalline material layer (26) with vias (211, 231) fabricated in an underlying monocrystalline substrate (22) in a single monolithic three dimensional architecture (20, 34). Excellent compliancy is achieved in a monolithic semiconductor structure (20, 34) by processes described herein while at the same time fabrication of via openings (211, 231) in the monocrystalline substrate (20, 34) can be made in a controlled, aligned manner to the back side (263) of a high quality monocrystalline film (26). Conductive connections (219, 239) can be made to devices (271, 273) in the high quality monocrystalline layer (26) from its backside (263).
    Type: Application
    Filed: July 16, 2001
    Publication date: January 16, 2003
    Applicant: MOTOROLA, INC.
    Inventor: Jonathan F. Gorrell
  • Patent number: 6228275
    Abstract: A sensor has a support substrate (200), an electrode (110, 510, 710) movable relative to a surface (201) of the support substrate (200) and comprised of a first material, a structure (160, 460, 560, 760) over a portion of the electrode (110, 510, 710) to limit mobility of the electrode (110, 510, 710) and comprised of a second material different from the first material, and bonding pads (170, 470) outside a perimeter of the electrode (110, 510, 710) and comprised of the second material.
    Type: Grant
    Filed: December 10, 1998
    Date of Patent: May 8, 2001
    Assignee: Motorola, Inc.
    Inventors: Daniel J. Koch, Jonathan H. Hammond, Daniel N. Koury, Jr., Jonathan F. Gorrell