Patents by Inventor Jonathan G. Bradley

Jonathan G. Bradley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6609163
    Abstract: A microprocessor 1 is described which includes a multi-channel serial port (MCSP) 120. MCSP 120 includes clock generation and frame sync generation circuitry 300, multi-channel selection circuitry 310, and companding circuitry 320. The clock generation and frame sync generation circuitry is configurable by means of a Serial Port Control Register SPCR, and Receive Control Register RCR, a Transmit Control Register XCR, a Sample Rate Generator Register SRGR, and Pin Control Register PCR. The multi-channel selection circuitry is configurable by means of a Multi-Channel Register MCR, a Receive Channel Enable Register RCER and a Transmit Channel Enable Register XCER. Companding circuitry 320 performs optional expansion or compression of received or transmitted data using &mgr;-LAW or A-LAW, as selected by the Receive Control Register or the Transmit Control Register.
    Type: Grant
    Filed: June 9, 2000
    Date of Patent: August 19, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Tai H. Nguyen, Jason A. T. Jones, Jonathan G. Bradley, Natarajan Seshan
  • Patent number: 6167466
    Abstract: A microprocessor 1 is described which includes a multi-channel serial port (MCSP) 120. MCSP 120 includes clock generation and frame sync generation circuitry 300, multi-channel selection circuitry 310, and companding circuitry 320. The clock generation and frame sync generation circuitry is configurable by means of a Serial Port Control Register SPCR, and Receive Control Register RCR, a Transmit Control Register XCR, a Sample Rate Generator Register SRGR, and Pin Control Register PCR. The multi-channel selection circuitry is configurable by means of a Multi-Channel Register MCR, a Receive Channel Enable Register RCER and a Transmit Channel Enable Register XCER. Companding circuitry 320 performs optional expansion or compression of received or transmitted data using .mu.-LAW or A-LAW, as selected by the Receive Control Register or the Transmit Control Register.
    Type: Grant
    Filed: April 3, 1998
    Date of Patent: December 26, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Tai H. Nguyen, Jason A. T. Jones, Jonathan G. Bradley, Natarajan Seshan