Patents by Inventor Jonathan Herr

Jonathan Herr has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260128215
    Abstract: Multilayer components, assemblies, and methods for forming multilayer components and assemblies are provided. For example, a multilayer component includes a plurality of dielectric layers, including an outer dielectric layer, that are stacked in a Z-direction to form a substrate having a top and a bottom; a conductive layer formed over a respective one dielectric layer and disposed within the stacked plurality of dielectric layers such that the conductive layer is spaced apart from both the top and the bottom of the substrate along the Z-direction; a shield layer formed over the outer dielectric layer; and a plurality of vias extending from the shield layer. The plurality of vias can be electrically connected to a ground defined on a substrate of a device; the multilayer component can be mounted on a surface of the device or embedded within the device.
    Type: Application
    Filed: October 23, 2025
    Publication date: May 7, 2026
    Inventors: Caleb Winfrey, Cory Nelson, Jonathan Herr
  • Publication number: 20250393131
    Abstract: A surface mount component can include a monolithic substrate, an input terminal, an output terminal, and a DC bias terminal. Each terminal can be formed over the monolithic substrate. A conductive trace can be formed over a surface of the monolithic substrate included in a signal path between the input terminal and the output terminal. A thin-film resistor can be connected in a DC bias path between the DC bias terminal and the signal path. The DC bias path can have, at one or more locations along the DC bias path between the DC bias terminal and the signal path, a cross-sectional area in a plane that is perpendicular to the surface of the monolithic substrate. The cross-sectional area of the DC bias path can be less than about 1,000 square microns.
    Type: Application
    Filed: August 28, 2025
    Publication date: December 25, 2025
    Inventors: Cory Nelson, Gheorghe Korony, Jonathan Herr, Marianne Berolini
  • Patent number: 12432856
    Abstract: A surface mount component can include a monolithic substrate, an input terminal, an output terminal, and a DC bias terminal. Each terminal can be formed over the monolithic substrate. A conductive trace can be formed over a surface of the monolithic substrate included in a signal path between the input terminal and the output terminal. A thin-film resistor can be connected in a DC bias path between the DC bias terminal and the signal path. The DC bias path can have, at one or more locations along the DC bias path between the DC bias terminal and the signal path, a cross-sectional area in a plane that is perpendicular to the surface of the monolithic substrate. The cross-sectional area of the DC bias path can be less than about 1,000 square microns.
    Type: Grant
    Filed: March 24, 2022
    Date of Patent: September 30, 2025
    Assignee: KYOCERA AVX Components Corporation
    Inventors: Cory Nelson, Gheorghe Korony, Jonathan Herr, Marianne Berolini
  • Publication number: 20250174404
    Abstract: Multilayer electronic components and methods of forming multilayer electronic components are provided. For example, a multilayer electronic component includes a plurality of dielectric layers stacked in a Z-direction and comprising a dielectric material. The component also includes a first conductive layer overlying one of the plurality of dielectric layers and a second conductive layer overlying another of the plurality of dielectric layers and spaced apart from the first conductive layer in the Z-direction. The second conductive layer overlaps the first conductive layer in each of an X-direction and a Y-direction at an overlapping area to form a capacitor. The component further includes a via connected with one of the conductive layers at a location outside of the overlapping area. As another example, a via may connect with one conductive layer at a location opposite a non-conductive region formed in another conductive layer forming a capacitor with the one conductive layer.
    Type: Application
    Filed: November 15, 2024
    Publication date: May 29, 2025
    Inventors: Jonathan Herr, Cory Nelson, Marianne Berolini
  • Publication number: 20250174385
    Abstract: Multilayer structures and methods for forming multilayer structures and assemblies are provided. For example, a multilayer structure includes a plurality of dielectric layers stacked along a Z-direction; a first surface; a second surface opposite the first surface along the Z-direction; a via extending from the first surface to the second surface; a first conductive path defined on the first surface; and a second conductive path defined on the second surface. The via contacts both the first conductive path and the second conductive path to electrically connect the first conductive path to the second conductive path. The first conductive path, the second conductive path, and the via form an inductor.
    Type: Application
    Filed: November 13, 2024
    Publication date: May 29, 2025
    Inventors: Cory Nelson, Marianne Berolini, Jonathan Herr
  • Publication number: 20250174391
    Abstract: Inductors and methods for forming inductors and inductor assemblies are provided. For example, an inductor includes a core having a first surface and a second surface opposite the first surface; a plurality of vias extending from the first surface to the second surface; a first conductive path defined on the first surface; and a second conductive path defined on the second surface. At least one via of the plurality of vias contacts both the first and second conductive paths to electrically connect the first conductive path to the second conductive path.
    Type: Application
    Filed: November 13, 2024
    Publication date: May 29, 2025
    Inventors: Cory Nelson, Marianne Berolini, Jonathan Herr
  • Publication number: 20250167750
    Abstract: Filters, filter assemblies, and methods of forming filters are provided. For example, a filter includes a plurality of dielectric layers stacked in a Z-direction to form a substrate having a top and a bottom, and at least one conductive layer is formed over a dielectric layer. The conductive layer is positioned at a location along the Z-direction between the top and bottom of the substrate that is about 200 ?m or less from the bottom of the substrate. An assembly includes the filter attached to a device substrate. A method of forming the filter includes forming the dielectric layers and the at least one conductive layer, such as by forming the conductive layer over a dielectric layer, and stacking the plurality of layers to form a substrate with the conductive layer disposed about 200 ?m or less from a bottom of the substrate.
    Type: Application
    Filed: November 12, 2024
    Publication date: May 22, 2025
    Inventors: Cory Nelson, Marianne Berolini, Jonathan Herr
  • Publication number: 20250167414
    Abstract: Filters, filter assemblies, and methods of forming filters are provided. For example, a filter includes a plurality of dielectric layers that are stacked in a Z-direction to form a substrate having a top, a bottom, and a perimeter, with an outer dielectric layer disposed at the top. The filter also includes a plurality of conductive layers, with an outer conductive layer formed over the outer dielectric layer, and a plurality of vias that are defined along the perimeter of the substrate and extend from the outer conductive layer to the bottom of the substrate. An assembly includes the filter attached to a device substrate. A method of forming the filter includes forming the dielectric and conductive layers, such as by forming an outer conductive layer over an outer dielectric layer; stacking the plurality of layers to form a substrate; and defining a plurality of vias along the substrate's perimeter.
    Type: Application
    Filed: November 12, 2024
    Publication date: May 22, 2025
    Inventors: Cory Nelson, Marianne Berolini, Jonathan Herr
  • Publication number: 20250079404
    Abstract: A vertical component stack, assembly, and method are provided. For example, a vertical component stack may include a plurality of components that each include an upper surface and a lower surface opposite the upper surface along a vertical direction. The plurality of components are stacked along the vertical direction such that a lower surface of a second component of the plurality of components is disposed over an upper surface of a first component of the plurality of components. An input and an output of each component of the plurality of components is exposed on a lower surface of the first component of the plurality of components.
    Type: Application
    Filed: August 15, 2024
    Publication date: March 6, 2025
    Inventors: Jonathan Herr, Cory Nelson, Marianne Berolini, Joseph Hock
  • Publication number: 20250079321
    Abstract: Vertically oriented interposer stacks, assemblies, and methods are provided. For example, a vertically oriented interposer stack includes a plurality of interposers and a plurality of components. Each component is disposed between adjacent interposers. Each interposer includes a first side surface opposite a second side surface along the vertical direction. The first side surface and the second side surface each extend along the longitudinal direction from a first end surface to a second end surface. Each interposer has a first external termination formed on the first side surface and a second external termination formed on the first side surface. The first and second external terminations are spaced apart along the longitudinal direction. The interposers are stacked along the lateral direction such that the first external terminations are generally aligned with one another along the lateral direction and the second external terminations are generally aligned with one another along the lateral direction.
    Type: Application
    Filed: August 15, 2024
    Publication date: March 6, 2025
    Inventors: Jonathan Herr, Cory Nelson, Marianne Berolini, Joseph Hock
  • Publication number: 20250079419
    Abstract: Vertically oriented component stacks, assemblies, and methods are provided. For example, a vertically oriented component stack includes a plurality of components that each include a first side surface opposite a second side surface along a vertical direction. The first and second side surfaces each extend along a longitudinal direction from a first end surface to a second end surface. Each component has a first external termination and a second external termination formed on the first side surface. The first external termination is spaced apart from the second external termination along the longitudinal direction. The plurality of components are stacked along the lateral direction such that the first external terminations of the plurality of components are generally aligned with one another along the lateral direction and the second external terminations of the plurality of components are generally aligned with one another along the lateral direction.
    Type: Application
    Filed: August 15, 2024
    Publication date: March 6, 2025
    Inventors: Jonathan Herr, Cory Nelson, Marianne Berolini, Joseph Hock
  • Patent number: 12216988
    Abstract: In some embodiments, a method is provided for updating an editing parameter for a model for automatically suggesting revisions to text data. The method may include displaying, on a graphical user interface (GUI) of a user device, one or more interactive input elements, wherein each of the one or more input elements is associated with an editing parameter for a model for automatically suggesting revisions to text data. The method may include receiving, via the GUI, an input from a selected input element of the one or more input elements, wherein the input comprises an indication of a value for a selected editing parameter associated with the selected input element. The method may include updating the selected editing parameter for the model based on the value. The method may include using the model with the updated selected editing parameter to apply an edit operation to an obtained text-under-analysis.
    Type: Grant
    Filed: May 8, 2023
    Date of Patent: February 4, 2025
    Assignee: BLACKBOILER, INC.
    Inventors: Liam Roshan Dunan Emmart, Jonathan Herr, Daniel P. Broderick, Daniel Edward Simonson
  • Publication number: 20240330335
    Abstract: Aspects of the present disclosure relate to systems, methods, and computer program products for revising electronic documents, and more particularly, to systems, methods, and computer program products for suggesting edits to an electronic document using large language models (LLMs).
    Type: Application
    Filed: March 29, 2024
    Publication date: October 3, 2024
    Applicant: BLACKBOILER, INC.
    Inventors: Jonathan HERR, Daniel P. BRODERICK, Ryan MANNION, Daniel Edward SIMONSON
  • Publication number: 20240126989
    Abstract: A method for suggesting revisions to a document-under-analysis from a seed database, the seed database including a plurality of original texts each respectively associated with one of a plurality of final texts, the method for suggesting revisions including selecting a statement-under-analysis (“SUA”), selecting a first original text of the plurality of original texts, determining a first edit-type classification of the first original text with respect to its associated final text, generating a first similarity score for the first original text based on the first edit-type classification, the first similarity score representing a degree of similarity between the SUA and the first original text, selecting a second original text of the plurality of original texts, determining a second edit-type classification of the second original text with respect to its associated final text, generating a second similarity score for the second original text based on the second edit-type classification, the second similarity
    Type: Application
    Filed: June 7, 2023
    Publication date: April 18, 2024
    Applicant: BLACKBOILER, INC.
    Inventors: Jonathan HERR, Daniel Edward SIMONSON, Daniel P. BRODERICK
  • Publication number: 20230359810
    Abstract: In some embodiments, a method is provided for updating an editing parameter for a model for automatically suggesting revisions to text data. The method may include displaying, on a graphical user interface (GUI) of a user device, one or more interactive input elements, wherein each of the one or more input elements is associated with an editing parameter for a model for automatically suggesting revisions to text data. The method may include receiving, via the GUI, an input from a selected input element of the one or more input elements, wherein the input comprises an indication of a value for a selected editing parameter associated with the selected input element. The method may include updating the selected editing parameter for the model based on the value. The method may include using the model with the updated selected editing parameter to apply an edit operation to an obtained text-under-analysis.
    Type: Application
    Filed: May 8, 2023
    Publication date: November 9, 2023
    Applicant: BLACKBOILER, INC.
    Inventors: Liam Roshan Dunan EMMART, Jonathan HERR, Daniel P. BRODERICK, Daniel Edward SIMONSON
  • Publication number: 20230315975
    Abstract: Disclosed is a method for suggesting revisions to a document-under-analysis (“DUA”) from a seed database, the seed database including a plurality of original texts each respectively associated with one of a plurality of final texts. The method includes tokenizing the DUA into a plurality of statements-under-analysis (“SU As”), selecting a first SUA of the plurality of SU As, generating a first similarity score for each of the plurality of the original texts, the similarity score representing a degree of similarity between the first SUA and each of the original texts, selecting a first candidate original text of the plurality of the original texts, and creating an edited SUA (“ESUA”) by modifying a copy of the first SUA consistent with a first candidate final text associated with the first candidate original text.
    Type: Application
    Filed: April 12, 2023
    Publication date: October 5, 2023
    Applicant: BLACKBOILER, INC.
    Inventors: Jonathan HERR, Daniel P. BRODERICK, Daniel Edward SIMONSON
  • Patent number: 11709995
    Abstract: A method for suggesting revisions to a document-under-analysis from a seed database, the seed database including a plurality of original texts each respectively associated with one of a plurality of final texts, the method for suggesting revisions including selecting a statement-under-analysis (“SUA”), selecting a first original text of the plurality of original texts, determining a first edit-type classification of the first original text with respect to its associated final text, generating a first similarity score for the first original text based on the first edit-type classification, the first similarity score representing a degree of similarity between the SUA and the first original text, selecting a second original text of the plurality of original texts, determining a second edit-type classification of the second original text with respect to its associated final text, generating a second similarity score for the second original text based on the second edit-type classification, the second similarity
    Type: Grant
    Filed: February 4, 2022
    Date of Patent: July 25, 2023
    Assignee: BLACKBOILER, INC.
    Inventors: Jonathan Herr, Daniel Edward Simonson, Daniel P. Broderick
  • Patent number: 11681864
    Abstract: In some embodiments, a method is provided for updating an editing parameter for a model for automatically suggesting revisions to text data. The method may include displaying, on a graphical user interface (GUI) of a user device, one or more interactive input elements, wherein each of the one or more input elements is associated with an editing parameter for a model for automatically suggesting revisions to text data. The method may include receiving, via the GUI, an input from a selected input element of the one or more input elements, wherein the input comprises an indication of a value for a selected editing parameter associated with the selected input element. The method may include updating the selected editing parameter for the model based on the value. The method may include using the model with the updated selected editing parameter to apply an edit operation to an obtained text-under-analysis.
    Type: Grant
    Filed: December 27, 2021
    Date of Patent: June 20, 2023
    Assignee: BLACKBOILER, INC.
    Inventors: Liam Roshan Dunan Emmart, Jonathan Herr, Daniel P. Broderick, Daniel Edward Simonson
  • Patent number: 11630942
    Abstract: Disclosed is a method for suggesting revisions to a document-under-analysis (“DUA”) from a seed database, the seed database including a plurality of original texts each respectively associated with one of a plurality of final texts. The method includes tokenizing the DUA into a plurality of statements-under-analysis (“SUAs”), selecting a first SUA of the plurality of SUAs, generating a first similarity score for each of the plurality of the original texts, the similarity score representing a degree of similarity between the first SUA and each of the original texts, selecting a first candidate original text of the plurality of the original texts, and creating an edited SUA (“ESUA”) by modifying a copy of the first SUA consistent with a first candidate final text associated with the first candidate original text.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: April 18, 2023
    Assignee: BLACKBOILER, INC.
    Inventors: Jonathan Herr, Daniel P. Broderick, Daniel Edward Simonson
  • Publication number: 20220312593
    Abstract: A surface mount component can include a monolithic substrate, an input terminal, an output terminal, and a DC bias terminal. Each terminal can be formed over the monolithic substrate. A conductive trace can be formed over a surface of the monolithic substrate included in a signal path between the input terminal and the output terminal. A thin-film resistor can be connected in a DC bias path between the DC bias terminal and the signal path. The DC bias path can have, at one or more locations along the DC bias path between the DC bias terminal and the signal path, a cross-sectional area in a plane that is perpendicular to the surface of the monolithic substrate. The cross-sectional area of the DC bias path can be less than about 1,000 square microns.
    Type: Application
    Filed: March 24, 2022
    Publication date: September 29, 2022
    Inventors: Cory Nelson, Gheorghe Korony, Jonathan Herr, Marianne Berolini