Patents by Inventor Jonathan Iloreta

Jonathan Iloreta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11099137
    Abstract: A semiconductor metrology tool inspects an area of a semiconductor wafer. The inspected area includes a plurality of instances of a 3D semiconductor structure arranged periodically in at least one dimension. A computer system generates a model of a respective instance of the 3D semiconductor structure based on measurements collected during the inspection. The computer system renders an augmented-reality or virtual-reality (AR/VR) image of the model that shows a 3D shape of the model and provides the AR/VR image to an AR/VR viewing device for display.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: August 24, 2021
    Assignee: KLA Corporation
    Inventors: Aaron J. Rosenberg, Jonathan Iloreta, Thaddeus G. Dziura, Antonio Gellineau, Yin Xu, Kaiwen Xu, John Hench, Abhi Gunde, Andrei Veldman, Liequan Lee, Houssam Chouaib
  • Publication number: 20200393386
    Abstract: A semiconductor metrology tool inspects an area of a semiconductor wafer. The inspected area includes a plurality of instances of a 3D semiconductor structure arranged periodically in at least one dimension. A computer system generates a model of a respective instance of the 3D semiconductor structure based on measurements collected during the inspection. The computer system renders an augmented-reality or virtual-reality (AR/VR) image of the model that shows a 3D shape of the model and provides the AR/VR image to an AR/VR viewing device for display.
    Type: Application
    Filed: August 28, 2020
    Publication date: December 17, 2020
    Inventors: Aaron J. Rosenberg, Jonathan Iloreta, Thaddeus G. Dziura, Antonio Gellineau, Yin Xu, Kaiwen Xu, John Hench, Abhi Gunde, Andrei Veldman, Liequan Lee, Houssam Chouaib
  • Patent number: 10794839
    Abstract: A semiconductor metrology tool inspects an area of a semiconductor wafer. The inspected area includes a plurality of instances of a 3D semiconductor structure arranged periodically in at least one dimension. A computer system generates a model of a respective instance of the 3D semiconductor structure based on measurements collected during the inspection. The computer system renders an image of the model that shows a 3D shape of the model and provides the image to a device for display.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: October 6, 2020
    Assignee: KLA Corporation
    Inventors: Aaron J. Rosenberg, Jonathan Iloreta, Thaddeus G. Dziura, Antonio Gellineau, Yin Xu, Kaiwen Xu, John Hench, Abhi Gunde, Andrei Veldman, Liequan Lee, Houssam Chouaib
  • Publication number: 20200271595
    Abstract: A semiconductor metrology tool inspects an area of a semiconductor wafer. The inspected area includes a plurality of instances of a 3D semiconductor structure arranged periodically in at least one dimension. A computer system generates a model of a respective instance of the 3D semiconductor structure based on measurements collected during the inspection. The computer system renders an image of the model that shows a 3D shape of the model and provides the image to a device for display.
    Type: Application
    Filed: February 22, 2019
    Publication date: August 27, 2020
    Inventors: Aaron J. Rosenberg, Jonathan Iloreta, Thaddeus G. Dziura, Antonio Gellineau, Yin Xu, Kaiwen Xu, John Hench, Abhi Gunde, Andrei Veldman, Liequan Lee, Houssam Chouaib
  • Patent number: 9553033
    Abstract: Methods and tools for generating measurement models of complex device structures based on re-useable, parametric models are presented. Metrology systems employing these models are configured to measure structural and material characteristics associated with different semiconductor fabrication processes. The re-useable, parametric sub-structure model is fully defined by a set of independent parameters entered by a user of the model building tool. All other variables associated with the model shape and internal constraints among constituent geometric elements are pre-defined within the model. In some embodiments, one or more re-useable, parametric models are integrated into a measurement model of a complex semiconductor device. In another aspect, a model building tool generates a re-useable, parametric sub-structure model based on input from a user.
    Type: Grant
    Filed: January 12, 2015
    Date of Patent: January 24, 2017
    Assignee: KLA-Tencor Corporation
    Inventors: Jonathan Iloreta, Matthew A. Laffin, Leonid Poslavsky, Torsten Kaack, Qiang Zhao, Lie-Quan Lee
  • Patent number: 9127927
    Abstract: Provided are optimized scatterometry techniques for evaluating a diffracting structure. In one embodiment, a method includes computing a finite-difference derivative of a field matrix with respect to first parameters (including a geometric parameter of the diffracting structure), computing an analytic derivative of the Jones matrix with respect to the field matrix, computing a derivative of the Jones matrix with respect to the first parameters, and computing a finite-difference derivative of the Jones matrix with respect to second parameters (including a non-geometric parameter). In one embodiment, a method includes generating a transfer matrix having Taylor Series approximations for elements, and decomposing the field matrix into two or more smaller matrices based on symmetry between the incident light and the diffracting structure.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: September 8, 2015
    Assignee: KLA-Tencor Corporation
    Inventors: Jonathan Iloreta, Paul Aoyagi, Hanyou Chu, Jeffrey Chard, Peilin Jiang, Mikhail Sushchik, Leonid Poslavsky, Philip D. Flanner, III
  • Publication number: 20150199463
    Abstract: Methods and tools for generating measurement models of complex device structures based on re-useable, parametric models are presented. Metrology systems employing these models are configured to measure structural and material characteristics associated with different semiconductor fabrication processes. The re-useable, parametric sub-structure model is fully defined by a set of independent parameters entered by a user of the model building tool. All other variables associated with the model shape and internal constraints among constituent geometric elements are pre-defined within the model. In some embodiments, one or more re-useable, parametric models are integrated into a measurement model of a complex semiconductor device. In another aspect, a model building tool generates a re-useable, parametric sub-structure model based on input from a user.
    Type: Application
    Filed: January 12, 2015
    Publication date: July 16, 2015
    Inventors: Jonathan Iloreta, Matthew A. Laffin, Leonid Poslavsky, Torsten Kaack, Qiang Zhao, Lie-Quan Lee
  • Publication number: 20130158948
    Abstract: Provided are optimized scatterometry techniques for evaluating a diffracting structure. In one embodiment, a method includes computing a finite-difference derivative of a field matrix with respect to first parameters (including a geometric parameter of the diffracting structure), computing an analytic derivative of the Jones matrix with respect to the field matrix, computing a derivative of the Jones matrix with respect to the first parameters, and computing a finite-difference derivative of the Jones matrix with respect to second parameters (including a non-geometric parameter). In one embodiment, a method includes generating a transfer matrix having Taylor Series approximations for elements, and decomposing the field matrix into two or more smaller matrices based on symmetry between the incident light and the diffracting structure.
    Type: Application
    Filed: December 12, 2012
    Publication date: June 20, 2013
    Inventors: Jonathan Iloreta, Paul Aoyagi, Hanyou Chu, Jeffrey Chard, Peilin Jiang, Mikhail Sushchik, Leonid Poslavsky, Phillip D. Flanner, III