Patents by Inventor Jonathan J. Hurd

Jonathan J. Hurd has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030130963
    Abstract: A system and method is provided that enables a postal customer to order a shipping label on-line via the internet. The label may be a mailing label to be placed on letters or parcels. The label includes information such as postage, delivery address, return address, and a barcode for tracking delivery information. A user may request both a label and postage in what, to the user, appears to be a single computerized connection on a single internet web-page. A postage indicia is provided through a postage provider with whom the user has a deposit or credit. The label itself may be generated through a label-generating application hosted or generated by an entity separate from the postage provider.
    Type: Application
    Filed: July 29, 2002
    Publication date: July 10, 2003
    Inventors: Vantresa Stickler, Paul J. Wanish, Richard A. Connell, Pamela Morgan, Jonathan J. Hurd, John Gullo
  • Patent number: 5539478
    Abstract: A video display, which may be a television receiver with associated set top device, an intelligent television receiver, or a personal computer system enabled for television display, has associated therewith a remote control of the three axis type which controls modification of the visual images displayed.
    Type: Grant
    Filed: May 31, 1995
    Date of Patent: July 23, 1996
    Assignee: International Business Machines Corporation
    Inventors: Randal L. Bertram, Larry A. Black, Jonathan J. Hurd, Thomas K. Worthington
  • Patent number: 5514972
    Abstract: A circuit compares a difference between first and second voltages to a predetermined voltage. The circuit comprises an amplifier having first and second inputs. First and second capacitors are each coupled at one end to the first input of the amplifier. The first capacitor is charged with the first voltage and subsequently discharged. The second capacitor is charged with a first reference voltage and subsequently discharged. Third and fourth capacitors are each coupled at one end to the second input of the amplifier. The third capacitor is charged with the second voltage and subsequently discharged. The fourth capacitor is charged with a second reference voltage and subsequently discharged.
    Type: Grant
    Filed: October 20, 1994
    Date of Patent: May 7, 1996
    Assignee: International Business Machines Corporation
    Inventors: Mark K. DeMoor, Paul W. Graf, Jonathan J. Hurd
  • Patent number: 5391947
    Abstract: A circuit for providing an output current proportional to a first voltage raised to a fractional exponential power divided by a second voltage raised to a fractional exponential power, is supplied. The circuit has four strings of series connected pn junctions. The first and second voltages are connected to the first and fourth string, respectively. A reference current is provided to the second string, while the third string provides the output current. The number of pn junctions are chosen to give the desired fractional exponents of the two voltages while the number of pn junctions in the third string is selected to adjust for the number of pn junctions in the other strings.
    Type: Grant
    Filed: December 17, 1993
    Date of Patent: February 21, 1995
    Assignee: International Business Machines Corporation
    Inventors: James O. Groves, Jr., Jonathan J. Hurd, Stephen F. Newton
  • Patent number: 4902957
    Abstract: A latch (29) is set by a clock (33) to turn on power switch (FET 5). The latch (29) is reset by high voltage comparator (21), by a 50 percent clock delay (35) and by a low-voltage-to-charging-current comparator (19). The voltage at turn-on is compared with a up-ramping reference (15) until it equals an operating reference (17). A temporary delay (pulse circuit 39 and gate 37) is provided before the low voltage comparison can be effective. The delay prevents response to parasitic effects across the power switch (5). Excess drive is prevented resulting from low output currents and malfunctions, and at turn-on.
    Type: Grant
    Filed: April 27, 1989
    Date of Patent: February 20, 1990
    Assignee: International Business Machines Corporation
    Inventors: John C. Cassani, Mark K. DeMoor, Paul W. Graf, Jonathan J. Hurd, Christopher D. Jones, Stephen F. Newton, David R. Thomas