Abstract: Embodiments of the present invention provide a storage device. In one embodiment, the storage device comprises a magnetic memory and a control circuit. The control circuit is configured to transfer selected data from the magnetic memory a selected number of times and to regulate the transfer of the selected data from the magnetic memory subsequent to transferring the selected data from the magnetic memory the selected number of times.

Abstract: Embodiments of the present invention provide a magnetic memory. In one embodiment, the magnetic memory comprises an array of memory cells configured to provide resistive states, and a read circuit. The read circuit is configured to sense a resistance through a memory cell in the array of memory cells to obtain a sense result and categorize the sense result into one of at least three different categories comprising a middle category situated between the resistive states.

Abstract: An MRAM solid-state storage device is disclosed having at least one array of magnetoresistive storage cells.

Abstract: Systems and methods for reducing the effect of noise while reading data in series from memory, are provided. One system embodiment comprises a memory cell that stores a first data; a sensing device that receives the first data multiple times and provides a first set of outputs; and a voting system that evaluates the first set of outputs to determine whether one of the outputs of the first set is valid data from the memory cell. One method embodiment comprises reading data in series that is stored in a memory cell to provide outputs; and evaluating the outputs to determine whether one of the outputs is valid data from the memory cell.

Abstract: A magnetoresistive solid-state storage device (MRAM) employs error correction coding (ECC) to form ECC encoded stored data. A linear error correction block code such as a Reed-Solomon code forms codewords having a plurality of symbols. In almost all cases, a corrected codeword is formed by error correction decoding a read codeword in a standard first decoder arranged to reliably identify and correct up to a predetermined number of failed symbols, or else determine an unrecoverable error. Error correction decoding of the read codeword is then attempted in a stronger second decoder, ideally being a maximum likelihood decoder arranged to form one or more closest corrected codewords.

Abstract: A magnetoresistive state-solid state storage device comprises many arrays 101-108 of magnetoresistive storage cells 16. Sparing resources such as a plurality of spare rows 120 are allocated to replace rows 12 of storage cells 16 which are affected by physical failures. A count is made for the number of failed rows within each array, and a count is also made of the number of failed rows within a cross-array row set r1-r4 spread across plural arrays. A spare row or rows 120 are allocated by selecting a cross-array row set r1-r4 affected by the highest number of failed rows and therefore most likely to lead to unreliable data storage, and then selecting an array 10 in this cross-array row set having the lowest number of failed rows, and therefore the least competition for sparing resources. The method proceeds iteratively with counts updated as sparing resources are allocated, thereby leaving until last those arrays 10 for which originally there was intense competition for spares.

Abstract: A magnetoresistive solid-state storage device (MRAM) performs error correction coding (ECC) of stored information. At manufacture or during use, each logical block of ECC encoded data and/or the corresponding set of storage cells are evaluated to determine suitability for continued use, or whether remedial action is necessary. In a first preferred method ECC decoding is attempted to determine whether information is unrecoverable from the block of ECC encoded data. In a second preferred method a parametric evaluation is made prior to attempting ECC decoding.

Abstract: A magnetoresistive solid-state storage device (MRAM) employs error correction coding (ECC) to form ECC encoded stored data. In a read operation, parametric values are obtained from storage cells 16 of the device and compared to ranges to establish logical bit values, together with erasure information. The erasure information identifies symbols 206 in a block of ECC encoded data 204 which, from the parametric evaluation, are suspected to be affected by physical failures of the storage cells 16. Where the position of suspected failed symbols 206 is known from this erasure information, the ability of a decoder 22 to perform ECC decoding is substantially enhanced.

Abstract: A fault-tolerant magnetoresistive solid-state storage device (MRAM) in use performs error correction coding and decoding of stored information, to tolerate physical defects. At manufacture, the MRAM device is tested to confirm that each set of storage cells is suitable for storing ECC encoded data, using either a parametric evaluation (step 602), or a logical evaluation (step 603) or preferably a combination of both. Failed cells are identified and a count is formed, suitably in terms of ECC symbols 206 that would be affected by such failed cells (step 604). The count can be compared to a threshold (step 605) to determine suitability of the accessed storage cells and a decision made (step 606) on whether to continue with use of those cells, or whether to take remedial action.

Abstract: A magnetoresistive solid-state storage device (MRAM) employs error correction coding (ECC) to form ECC encoded stored data. In a read operation, a set of test cells 160 in a test row 120 are used to predict failures 163 amongst a set of cells of interest storing a block of ECC encoded data. Erasure information is formed from these predictions which identifies potentially unreliable symbols 206 in the block of ECC encoded data, and the ability of a decoder 22 to perform ECC decoding is substantially enhanced.

Abstract: A magnetoresistive solid-state storage device (MRAM) employs error correction coding (ECC) to form ECC encoded stored data. ECC encoded data is read and decoded to identify failed symbols. A failure history table is then updated to indicate columns 14 of an array of storage cells 16 which are suspected to be affected by physical failures. Advantageously, erasure information is formed with reference to the failure history table, and the ability of a decoder 22 to perform ECC decoding is substantially enhanced.

Abstract: A magnetoresistive solid-state storage device (MRAM) performs error correction coding (ECC) of stored information. Since currently available MRAM devices are subject to physical failures, data storage arrangements are described to minimise the affect of those failures on the stored ECC encoded data, including storing all bits of each symbol in storage cells 16 in one row 12 (FIG. 3), or in at least two rows 12 but using storage cells 16 in the same columns 14 (FIG. 4). Sets of bits taken from each row 12 are allocated to different codewords 204 (FIG. 5) and the order of allocation can be rotated (FIG. 6). A second level of error checking can be applied by adding a parity bit 226 to each symbol 206 (FIG. 7).

Abstract: A fault-tolerant magnetoresistive solid-state storage device (MRAM) in use performs error correction coding and decoding of stored information, to tolerate physical failures. At manufacture, the MRAM device is tested to confirm that each set of storage cells is suitable for storing ECC encoded data. The test comprises identifying failed storage cells where the failures will be visible in use for the generation of erasure information used in ECC decoding, suitably by comparing parametric values obtained from the storage cells against one or more failure ranges, and includes performing a write-read-compare operation with test data to identify failed storage cells which will be hidden for the generation of erasure information in use. A failure count is formed based on both the visible failures and the hidden failures, to determine that the set of storage cells is suitable for storing ECC encoded data. Here, the failure count is weighted, with hidden failures having a greater weighting than visible failures.

Abstract: A magnetoresistive solid-state storage device (MRAM device) uses storage cells 16 arranged in many arrays 10 to form a macro-array 2. For fast access times and to reduce exposure to physical failures, each unit of data (e.g. a sector) is stored with a few sub-units (e.g. bytes) in each of a large plurality of the arrays 10. Advantageously, the plurality of arrays 10 are accessible in parallel substantially simultaneously, and a failure in any one array affects only a small portion of the data unit. Optionally, error correction coding (ECC) is employed to form encoded data with symbols which are stored according to preferred embodiments which further minimise exposure to physical failures.

Abstract: In a coded orthogonal frequency division multiplex (COFDM) system n-bit data words are encoded as 2m-symbol code words, each symbol having 2j possible values (e.g. j=3 for octary). An efficient decoder for these code words is provided by applying j iterations of the fast Hadamard transform, the input vector for the second and subsequent iterations being derived from the result of the immediately preceding iteration.

Abstract: In a coded orthogonal frequency division multiplex (COFDM) system n-bit data words are encoded as 2m-symbol code words (binary, quaternary, octary, etc.). The code words are selected for desired low peak-to-mean envelope power ratio (PMEPR) characteristics of transmissions over a COFDM channel, from a set of cosets of a linear sub-code of a code having a specified generator matrix. The code words thus identified by the procedure described can, even for values of m in excess of 3, simultaneously limit the PMEPR to 3 dB, provide specified error control characteristics, be implemented in a feasible manner using analytical circuit techniques (e.g. with combinatorial logic), and include sufficiently many different code words to enable data to be transferred at useful rates. Other selections of code words can be made, enabling a higher maximum PMEPR or a reduced error detection capability to be accepted in order to obtain a higher code rate.

Abstract: Apparatus for verifying a CRC code of a message transmitted as a succession of sub-blocks comprises dedicated hardware including a linear feedback shift register for deriving a `partial` CRC code for each individual sub-block. These partial CRC codes are held in a store for subsequent combination under software program control. The combination is performed in a iterative manner, each partial CRC code being added modulo 2 to values selected from look-up tables in accordance with the result of the previous step of the iteration. The division of the CRC verification into two operations and the use of precalculated look-up tables facilitate the efficient, simultaneous reception of many messages having interleaved sub-blocks without incurring serious time penalties.

Abstract: A method of coding, and a coder, using a code in which data words are assigned to code word pairs in a selective manner, so that the value of a data word error resulting from inversion of a bit in a code word may be specific to and dependent solely upon the position within the code word of the inverted bit.

Abstract: A method for transmitting data packets, grouped as data octets, over a LAN having a central hub linked to each of a plurality of network nodes via a physical medium consisting of four pairs of unshielded twisted pair (UTP) cable. The transmission method sequentially divides the data into data quintets. The quintets are then arranged into blocks of data quintets and sequentially distributed into four individual serial code streams. The four serial code streams are sequentially scrambled to produce four streams of randomized quintets. The randomized data streams are sequentially block encoded into 6-bit symbol data which are then transmitted using NRZ modulation across the network by transmitting each data stream over one of said pairs of cable.

Abstract: A data stream to be communicated over a plurality of channels is divided into blocks (A1,B1,C1,D1,A2,B2, . . . ), and each successive block is transmitted along a different channel (A,B,C,D) on a cyclic basis. To reduce or eliminate the possibility of undetectable errors occurring owing to noise affecting all channels simultaneously and thereby corrupting data in several successive blocks propagating in parallel through the channels, the blocks in at least one channel (A,B) are offset in time relative to the blocks in another channel (C,D). In the case of four channels, such as four-conductor cable, the blocks on two channels are offset by half the length of a block relative to the blocks on the remaining two channels.