Abstract: An input device that includes multiple electrodes disposed in a sensing region of the input device and a sensing circuit coupled to a first electrode and configured to detect an input object proximate the sensing region. The sensing circuit includes an amplifier having an inverting input coupled to the first electrode, a non-inverting input coupled to a drive signal, and an output generating a resulting signal. The sensing circuit includes a feedback capacitor coupled between the output and the inverting input of the amplifier. The drive signal comprises a first sinusoidal signal having a first operating frequency and a second sinusoidal signal having a second operating frequency. The resulting signal is determined by the feedback capacitor and a capacitance of the first electrode caused by the input object. The resulting signal generates a sensing signal on the first electrode.

Abstract: An input device that includes multiple electrodes disposed in a sensing region of the input device and a sensing circuit coupled to a first electrode and configured to detect an input object proximate the sensing region. The sensing circuit includes an amplifier having an inverting input coupled to the first electrode, a non-inverting input coupled to a drive signal, and an output generating a resulting signal. The sensing circuit includes a feedback capacitor coupled between the output and the inverting input of the amplifier. The drive signal comprises a first sinusoidal signal having a first operating frequency and a second sinusoidal signal having a second operating frequency. The resulting signal is determined by the feedback capacitor and a capacitance of the first electrode caused by the input object. The resulting signal generates a sensing signal on the first electrode.

Abstract: A method and apparatus of global coarse baseline correction (GCBC) for capacitive scanning. An input device may include a number (N) of sensor electrodes, a GCBC circuit, and detection circuitry. Each sensor electrode is associated with a respective channel. The GCBC circuit produces sensing signals in each of the N channels and the detection circuitry may detect changes in the capacitances of one or more sensor electrodes based on the sensing signals. In some implementations, the GCBC circuit may include a current source which outputs a first current, a transimpedance amplifier (TIA) which converts the first current to a sensing voltage, and a number (N) of resistors that can be coupled between the output of the TIA and the N sensor electrodes, respectively. The coupling of each resistor between the TIA and a respective sensor electrode produces a sensing signal in the channel associated with the sensor electrode.

Abstract: A method and apparatus of global coarse baseline correction (GCBC) for capacitive scanning. An input device may include a number (N) of sensor electrodes, a GCBC circuit, and detection circuitry. Each sensor electrode is associated with a respective channel. The GCBC circuit produces sensing signals in each of the N channels and the detection circuitry may detect changes in the capacitances of one or more sensor electrodes based on the sensing signals. In some implementations, the GCBC circuit may include a current source which outputs a first current, a transimpedance amplifier (TIA) which converts the first current to a sensing voltage, and a number (N) of resistors that can be coupled between the output of the TIA and the N sensor electrodes, respectively. The coupling of each resistor between the TIA and a respective sensor electrode produces a sensing signal in the channel associated with the sensor electrode.

Abstract: Disclosed are systems and method for imaging an input object. An imaging device includes: a light source that emanates light to a sensing region in which the input object to be imaged is placed; a collimator filter layer; an image sensor array disposed below the collimator filter layer that blocks some light reflected from the input object while other light passes through apertures in the collimator filter layer and arrives at the image sensor array; and a controller configured to cause a first image of the input object to be captured with the light source turned on, and to transmit the first image to a processor associated with the electronic device to perform image matching against one or more template images before causing a second image of the input object to be captured with the light source turned off.

Abstract: Disclosed are systems and method for imaging an input object. An imaging device includes: a light source that emanates light to a sensing region in which the input object to be imaged is placed; a collimator filter layer; an image sensor array disposed below the collimator filter layer that blocks some light reflected from the input object while other light passes through apertures in the collimator filter layer and arrives at the image sensor array; and a controller configured to cause a first image of the input object to be captured with the light source turned on, and to transmit the first image to a processor associated with the electronic device to perform image matching against one or more template images before causing a second image of the input object to be captured with the light source turned off.

Abstract: An output clock recovery circuit (10) for recovering an output clock (14) from a source clock (12) and time stamp information (18A, 18B) includes a time stamp translator (22) and a phase-locked loop circuit (17) including a fraction processor (34). The time stamp translator (22) receives the time stamp information (18A, 18B) and uses an algorithm that translates the time stamp information (18A, 18B) into a time stamp decimal component (48) and a time stamp integer component (50). The time stamp decimal component (48) is less than one and is processed by the fraction processor (34). The time stamp integer component (50) is maintained within a predetermined range of integers that are greater than zero. The output of the fraction processor (34) and the time stamp integer component (50) can be input into a feedback divider (36) of a feedback loop of the phase-locked loop circuit (17) to recover the output clock (14).

Abstract: An output clock recovery circuit (10) for recovering an output clock (14) from a source clock (12) and time stamp information (18A, 18B) includes a time stamp translator (22) and a phase-locked loop circuit (17) including a fraction processor (34). The time stamp translator (22) receives the time stamp information (18A, 18B). The time stamp translator (22) uses an algorithm that translates the time stamp information (18A, 18B) into a time stamp decimal component (48) and a time stamp integer component (50). The time stamp decimal component (48) is less than one and is processed by the fraction processor (34). The time stamp integer component (50) is maintained within a predetermined range of integers that are greater than zero. The predetermined range can vary. The time stamp translator (22) determines a value R, which equals the ratio of the output clock frequency to the source clock frequency times a constant. The algorithm can include a multiplier P that varies depending upon the value of R.