Patents by Inventor Jonathan L. Fasig

Jonathan L. Fasig has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11300616
    Abstract: A technique for non-invasively assessing current drawn by a device under test (DUT) by monitoring a supply voltage to the DUT. Frequency data for the DUT may be generated and used to form a current estimation model. First and second voltages are simultaneously measured using first and second test probes electrically connected to the DUT, while the first test probe is connected at a current source, and while the second test probe is connected at a DUT load that is configured to draw current from the current source. The current drawn by the DUT is then assessed by applying the current estimation model to the measured first and second voltages. In one case, the current drawn by the DUT is estimated without insertion of a circuit component into the DUT or extraction of a circuit conductor from the DUT.
    Type: Grant
    Filed: July 11, 2018
    Date of Patent: April 12, 2022
    Assignee: Mayo Foundation for Medical Education and Research
    Inventors: Jonathan L. Fasig, Christopher K. White, Chad M. Smutzer, Michael J. Degerstrom
  • Publication number: 20210132148
    Abstract: A technique for non-invasively assessing current drawn by a device under test (DUT) by monitoring a supply voltage to the DUT. Frequency data for the DUT may be generated and used to form a current estimation model. First and second voltages are simultaneously measured using first and second test probes electrically connected to the DUT, while the first test probe is connected at a current source, and while the second test probe is connected at a DUT load that is configured to draw current from the current source. The current drawn by the DUT is then assessed by applying the current estimation model to the measured first and second voltages. In one case, the current drawn by the DUT is estimated without insertion of a circuit component into the DUT or extraction of a circuit conductor from the DUT.
    Type: Application
    Filed: July 11, 2018
    Publication date: May 6, 2021
    Inventors: Jonathan L. Fasig, Christopher K. White, Chad M. Smutzer, Michael J. Degerstrom
  • Patent number: 5454080
    Abstract: A computer system having a removable hard disk drive is disclosed. The interposer card is modified to receive a docking bay which receives a cartridge which contains a hard disk drive. The docking bay includes the male portion of a zero insertion force connector and a first circuit board to which connects to the interposer card of the computer. The first circuit board also includes circuit paths between the male portion of the zero insertion force connector and the end which connects to the interposer card of the computer. The first circuit card also includes circuitry which allows "hot plugging" of the hard disk drive to the bus of the computer and which also acts as a lockout to prevent writing to the removable hard disk drive until after the computer system has been rebooted. The docking bay also includes a spring mechanism for ejecting the cartridge. A finger lever holds the cartridge in place and can be lifted to eject the cartridge.
    Type: Grant
    Filed: February 10, 1992
    Date of Patent: September 26, 1995
    Assignee: International Business Machines Corporation
    Inventors: Jonathan L. Fasig, Thomas R. Fournier, Kevin P. O'Marro
  • Patent number: 5325491
    Abstract: Disclosed is a bus expansion unit for extending the bus of a computer system which has an asynchronous bus cycle. The bus expansion unit includes an asynchronous state machine which uses a delay line to determine some of its states. The bus expansion unit recognizes the address and bus status and holds or latches a select signal. In addition, the bus expansion unit delays the -CMD signal until the peripheral has the opportunity to place valid data on a bus channel. In addition, the bus expansion unit includes an arbitration circuit for the peripheral attached thereto.
    Type: Grant
    Filed: April 13, 1993
    Date of Patent: June 28, 1994
    Assignee: International Business Machines Corporation
    Inventor: Jonathan L. Fasig