Patents by Inventor Jonathan M. Hanbury

Jonathan M. Hanbury has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Dynamic random-access memory system with power-up and power-down refresh circuits
    Patent number: 4901283
    Abstract: A dynamic random-access memory (DRAM) has a first refresh circuit for producing memory refreshes during power-up, and a second refresh circuit for producing memory refreshes during power-down. The power-down refresh circuit is powered by a battery, and has a lower power consumption than the power-up circuit. During transition from power-down to power-up, the frequency of refreshing is doubled for a short period, so as to build up a surplus of refreshes. This allows refreshing to stop while the first or power-up refresh circuit is brought back into operation.
    Type: Grant
    Filed: November 2, 1988
    Date of Patent: February 13, 1990
    Assignee: International Computers Limited
    Inventors: Jonathan M. Hanbury, Keith Burton