Abstract: Memory systems that include NAND flash memory and dynamic random access memory (DRAM) are configured to allow a considerably higher ratio of NAND to DRAM without a significant increase in write amplitude. The NAND includes a logical-to-physical (L2P) table. The DRAM includes a buffer divided into regions, an update table of recently written data and linked lists, one for each region of the buffer linking all items in the update table in that region, the DRAM maintaining a set of linked lists, each identifying all regions with the same number of updates in the update table.

Abstract: A system manages data transfer between a computer, a data storage disk, and a data buffer which is associated with the disk. Upon receipt of a write request during data read-ahead from the disk to the buffer, the system preempts the read-ahead to write the data to the disk only when the target write track on the disk is different from the track being read ahead into the buffer. Otherwise, the system permits read-ahead to continue until the target write sector is positioned beneath the disk drive head. Also, upon receipt of a read request during cache writing from the buffer to the disk, the system immediately satisfies the read request prior to completing the cache writing when the requested read data is contained in the buffer. Moreover, the system provides for dynamic switching between a data read-ahead preempt policy and a data read-ahead no-preempt policy based upon parallel monitoring and comparison of data request service times under both policies.