Patents by Inventor Jonathan Mark SMITH

Jonathan Mark SMITH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240141428
    Abstract: The present disclosure provides methods and systems for detecting multiple different nucleotides in a sample. In particular, the disclosure provides for detection of multiple different nucleotides in a sample utilizing fewer detection moieties than the number of nucleotides being detected and/or fewer imaging events than the number of nucleotides being detected.
    Type: Application
    Filed: October 18, 2023
    Publication date: May 2, 2024
    Inventors: Robert C. Kain, Xiaohai Liu, Wenyi Feng, Bernard Hirschbein, Helmy A. Eltoukhy, Xiaolin Wu, Geoffrey Paul Smith, Jonathan Mark Boutell, Thomas Joseph, Randall Smith, Min-Jui Richard Shen, Carolyn Tregidgo, Kay Klausing
  • Patent number: 11946096
    Abstract: The present invention relates to methods of imaging template hybridisation for estimating cluster numbers prior to solid phase amplification and sequencing. More particularly, an initial round of imaging is carried out at the single molecule template hybridisation stage which allows a general estimation of cluster numbers prior to clusters being formed. Amplification of the signal allows single molecule imaging to be carried out using standard sequencing imaging apparatus.
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: April 2, 2024
    Assignee: ILLUMINA CAMBRIDGE LIMITED
    Inventors: Isabelle Marie Julia Rasolonjatovo, Jonathan Mark Boutell, Vincent Peter Smith, Roberto Rigatti
  • Publication number: 20240102644
    Abstract: An audio filtering and power extraction apparatus for filtering out audio signal and extracting power from a combined signal and direct-current power line, with an input configured to couple to a combined signal and direct-current power line, a filtering extractor system functionally coupled to the input, a DC sensing switch circuit, and a second order low-pass filter functionally coupled to the DC sensing switch circuit, the second order low-pass filter including, an inductor, a capacitor and resistor in series with each other, and an output functionally coupled to an output of the filtering extractor system and through which output extracted power is provided.
    Type: Application
    Filed: September 23, 2022
    Publication date: March 28, 2024
    Applicant: Swarm Holdings LLC.
    Inventors: Jonathan Neil HART, Paul Mark Michalczuk, Jesse Alden Smith
  • Patent number: 10852959
    Abstract: The present disclosure relates to a data storage system, and processes and computer programs for such data storage system, for example including processing of: managing one or more metadata tree structures for storing data to one or more storage devices of the data storage system in units of blocks, each metadata tree structure including a root node pointing directly and/or indirectly to blocks, and a leaf tree level having one or more direct nodes pointing to blocks, and optionally including one or more intermediate tree levels having one or more indirect nodes pointing to indirect nodes and/or direct nodes of the respective metadata tree structure; maintaining the root node and/or nodes of at least one tree level of each of at least one metadata structure in a cache memory; and managing I/O access to data based on the one or more metadata structures, including obtaining the root node and/or nodes of the at least one tree level of the metadata structure maintained in the cache memory from the cache memory an
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: December 1, 2020
    Assignee: Hitachi, Ltd.
    Inventors: Mitsuo Hayasaka, Christopher James Aston, Jonathan Mark Smith, Yuko Matsui, Simon Latimer Benham, Trevor Edward Willis
  • Patent number: 10318194
    Abstract: The apparatus comprises a plurality of interfaces, each interface having an associated interface ID; and a hardware-side processing device including at least one programmable hardware-implemented chip configured to process request packets, which are received from host computers and relate to access requests to one or more file system managed by the apparatus, and to generate response packets for the processed request packets; wherein, for a request packet which is received from a first host computer, at least one programmable hardware-implemented chip is configured to: determine the client ID being associated with the first host computer, determine the interface ID being associated with the first interface, determine whether the determined client ID and interface ID represent a permitted ID set or a prohibited ID set, and refrain from processing the received request packet if the determined client ID and interface ID represent a prohibited ID set.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: June 11, 2019
    Assignee: Hitachi Vantara Corporation
    Inventors: Andrew Stephen Chittenden, Jonathan Mark Smith, Antonio Robert Carlini, Ashwin Payyanadan, Robert Ian Williams
  • Publication number: 20180285002
    Abstract: The present disclosure relates to a data storage system, and processes and computer programs for such data storage system, for example including processing of: managing one or more metadata tree structures for storing data to one or more storage devices of the data storage system in units of blocks, each metadata tree structure including a root node pointing directly and/or indirectly to blocks, and a leaf tree level having one or more direct nodes pointing to blocks, and optionally including one or more intermediate tree levels having one or more indirect nodes pointing to indirect nodes and/or direct nodes of the respective metadata tree structure; maintaining the root node and/or nodes of at least one tree level of each of at least one metadata structure in a cache memory; and managing I/O access to data based on the one or more metadata structures, including obtaining the root node and/or nodes of the at least one tree level of the metadata structure maintained in the cache memory from the cache memory an
    Type: Application
    Filed: June 6, 2018
    Publication date: October 4, 2018
    Inventors: Mitsuo HAYASAKA, Christopher James ASTON, Jonathan Mark SMITH, Yuko MATSUI, Simon Latimer BENHAM, Trevor Edward WILLIS
  • Patent number: 9996286
    Abstract: The present disclosure relates to a data storage system, and processes and computer programs for such data storage system, for example including processing of: managing one or more metadata tree structures for storing data to one or more storage devices of the data storage system in units of blocks, each metadata tree structure including a root node pointing directly and/or indirectly to blocks, and a leaf tree level having one or more direct nodes pointing to blocks, and optionally including one or more intermediate tree levels having one or more indirect nodes pointing to indirect nodes and/or direct nodes of the respective metadata tree structure; maintaining the root node and/or nodes of at least one tree level of each of at least one metadata structure in a cache memory; and managing I/O access to data based on the one or more metadata structures.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: June 12, 2018
    Assignee: Hitachi, Ltd.
    Inventors: Mitsuo Hayasaka, Christopher James Aston, Jonathan Mark Smith, Yuko Matsui, Simon Latimer Benham, Trevor Edward Willis
  • Publication number: 20170329541
    Abstract: The present disclosure relates to a data storage system, and processes and computer programs for such data storage system, for example including processing of: managing one or more metadata tree structures for storing data to one or more storage devices of the data storage system in units of blocks, each metadata tree structure including a root node pointing directly and/or indirectly to blocks, and a leaf tree level having one or more direct nodes pointing to blocks, and optionally including one or more intermediate tree levels having one or more indirect nodes pointing to indirect nodes and/or direct nodes of the respective metadata tree structure; maintaining the root node and/or nodes of at least one tree level of each of at least one metadata structure in a cache memory; and managing I/O access to data based on the one or more metadata structures.
    Type: Application
    Filed: December 9, 2016
    Publication date: November 16, 2017
    Inventors: Mitsuo HAYASAKA, Christopher James ASTON, Jonathan Mark SMITH, Yuko MATSUI, Simon Latimer BENHAM, Trevor Edward WILLIS
  • Publication number: 20170235509
    Abstract: The apparatus comprises a plurality of interfaces, each interface having an associated interface ID; and a hardware-side processing device including at least one programmable hardware-implemented chip configured to process request packets, which are received from host computers and relate to access requests to one or more file system managed by the apparatus, and to generate response packets for the processed request packets; wherein, for a request packet which is received from a first host computer, at least one programmable hardware-implemented chip is configured to: determine the client ID being associated with the first host computer, determine the interface ID being associated with the first interface, determine whether the determined client ID and interface ID represent a permitted ID set or a prohibited ID set, and refrain from processing the received request packet if the determined client ID and interface ID represent a prohibited ID set.
    Type: Application
    Filed: October 2, 2014
    Publication date: August 17, 2017
    Inventors: Andrew Stephen CHITTENDEN, Jonathan Mark SMITH, Antonio Robert CARLINI, Ashwin PAYYANADAN, Robert Ian WILLIAMS