Abstract: A shoulder strap for carrying a notebook computer is formed as an elongated member with a locking mechanism at a first end which attaches to the lock slot of the computer and a loop at the opposite end. By passing the strap through the loop, the opposite end portion of the strap is positioned around the computer adjacent the side opposite the side which includes the lock slot. With the first end of the strap secured to the computer by securing the locking mechanism at the computer lock slot, the intermediate portion of the strap extends over the users shoulder to enable transport of the computer. By forming the strap using a plastic coated steel cable, the shoulder strap may be used for both carrying the computer and as a security cable for securing the computer when unattended. The shoulder strap surfaces that engage the user's shoulder and surround and engage the notebook computer are formed of non-adhesive, non-slip material.

Abstract: A tamper sensing circuit is provided for an electrical device wherein an enclosure may be opened to access data by a user that does not possess the ability to achieve normal access by satisfying data security measures such as use of a password. A screw used to secure enclosure halves together is connected by a conductive coating at the enclosure member surface into which the screw is threaded to connect a tamper sensing circuit to the device ground potential. A tamper sensing circuit output node is maintained at the circuit ground potential as long as the screw is in electrical contact with the enclosure conductive coating. When the screw is disengaged from the enclosure member threaded opening, the output node is no longer grounded and rises to a supplied electrical potential indicating tampering and enabling appropriate corrective action.

Abstract: Embodiments are provided in which clock generation for a PCI bridge and its N attached secondary buses is carried out by using an external PLL clock generator which generates N+1 first clock signals at a first frequency to the bridge and to N multiplexers. The bridge in turn generates N second clock signals to the N multiplexers. Each of the N clock signals generated by the bridge can be at either a second or third frequency. Each of the N multiplexers passes one of the first clock signal and second clock signal to a secondary bus depending on the speed of the slowest adapter on the secondary bus.

Abstract: Embodiments are provided in which clock generation for a PCI bridge and its N attached secondary buses is carried out by using an external PLL clock generator which generates N+1 first clock signals at a first frequency to the bridge and to N multiplexers. The bridge in turn generates N second clock signals to the N multiplexers. Each of the N clock signals generated by the bridge can be at either a second or third frequency. Each of the N multiplexers passes one of the first clock signal and second clock signal to a secondary bus depending on the speed of the slowest adapter on the secondary bus.

Abstract: A method and apparatus for analog testing of hot-plug circuits on an active computer backplane. A test connector is added to the computer backplane that enables an external tester to turn on each card slot present on the computer backplane. The external tester then directs a test adapter card residing in a selected card slot to apply a nominal and overcurrent load to each voltage level of the selected card slot. After each load has been applied, the corresponding voltage level is returned to the external tester. The external tester then measures the voltage level, and verifies that the voltage level falls within a predefined voltage range. The test connector uses existing unutilized bus signal lines to pass test directives and results between the card slot under test and the external tester. The same test adapter card that performs the analog test on a card slot is also used to perform digital testing on the card, thus reducing both testing time and the complexity of the testing apparatus.

Abstract: In an electrical interface providing a predefined number of connections at least some of which have predefined functions and at least some of which have reserved, undefined or non-critical functions, selective use of at least one of the connections having a reserved, undefined or non-critical function is accomplished. At least one switch is provided which is controllable and coupled to switch at least one connection having a reserved, undefined or non-critical function to a desired customized function. In this way, the electrical interface can be selectively switched to provide additional functionality using reserved, undefined or non-critical connections of the interface.

Abstract: Hot-plugging and power management capabilities are simultaneously provided for a connector. Circuitry is provided to control a power management terminal so that it is powered up gradually and only after a device has been connected to the connector. The power management terminal is powered down when the device is disconnected from the connector under control of the circuitry. The power management voltage domain is isolated from the voltage domain of the system having the connector by further circuitry which also provides connection status lines.

Abstract: A multiple output level power supply is provided having an overpower detection circuit. The power supply provides multiple DC voltage output levels. A differential amplifier coupled to each DC voltage output level of the power supply is then utilized to generate a signal which is representative of the power output at each of the multiple voltage levels. The output of each differential amplifier is then coupled to a summer which generates a signal representative of the total power output from the multiple outputs of the power supply. A comparison of the total power output signal and a reference signal selected to be representative of the maximum desired power output may then be utilized to efficiently provide an indication of an overpower condition within the power supply.