Abstract: A memory device may comprise an array of non-volatile memory cells, and a memory controller configured for controlling access to the array of non-volatile memory cells. The memory controller may include firmware configured to control memory device performance to enforce a memory device policy. The memory controller may include at least one hardware register configured to store data indicative of the memory device policy. The firmware may be configured to read the data indicative of the memory device policy and enforce the memory device policy by controlling memory device performance.

Abstract: Apparatus and methods are disclosed, including using a memory controller to partition a memory array into a first portion and a second portion, the first portion and second portion having non-overlapping logical block addressing (LBA) ranges. The memory controller assigns a first granularity of a first logical-to-physical (L2P) mapping table entry for the first portion of the memory array designated for a first usage, and a second granularity of a second L2P mapping table entry for the second portion of the memory array designated for a second usage, where the second granularity is not equal to the first granularity. The memory controller stores the first granularity and the second granularity in the memory array, and stores at least a portion of the first L2P mapping table entry and the second L2P mapping table entry in an L2P cache of the memory controller.

Abstract: Devices and techniques for accelerated memory device trim initialization are described herein. An initialization of a memory device can be started by the memory device. An accelerated trim command can be received at the memory device from a controller. The memory device can refrain from setting a trim in response to receipt of the accelerated trim command. Here, the trim is expected to be set by the controller. The memory device can then complete the initialization after the trim is set by the controller.

Abstract: Apparatus and methods are disclosed, including using a memory controller to monitor at least one parameter related to power level of a host processor of a host device, and dynamically adjusting at least one of a clock frequency and a voltage level of an error-correcting code (ECC) subsystem of the memory controller based on the at least one parameter to control power usage of the host device.

Abstract: A memory device embodiment may include an array of non-volatile memory cells including a protected memory region. The protected memory region may include a dedicated sub region established by a host. The memory device embodiment may also include a memory controller configured to wipe the protected memory region or execute other security functions by issuing an authenticated data write command to the dedicated sub region of the protected region. Issuing the authenticated data write command may include signing the command with a key shared with the host that established the sub region.

Abstract: A request for memory sub-system log data is received from a host system. In response to receiving the request, a symmetric encryption key for encrypting the requested memory-sub-system log data is generated. The requested memory sub-system log data is encrypted using the symmetric encryption key. The symmetric encryption key is encrypted using an asymmetric encryption key. An encrypted data payload is generated and sent to the host system in response to the request. The encrypted data payload comprises the encrypted encryption key and the encrypted memory sub-system log data.

Abstract: Apparatus and methods are disclosed, including determining whether firmware has been successfully loaded and whether the firmware version is valid and operable, and if the firmware has not been successfully loaded or the firmware is not valid and operable, tracking a number of unsuccessful attempts to load the firmware or an elapsed time for unsuccessful attempts to load the firmware, and entering a memory device into a reduced-power state if either the number of unsuccessful attempts or the elapsed time has reached a programmable threshold.

Abstract: Apparatus and methods are provided for operating a non-volatile memory module. In an example, a method can include filling a first plurality of pages of a first non-volatile memory with first data from a first data lane that includes a first volatile memory device, and filling a second plurality of pages of the first non-volatile memory device with second data from a second data lane that includes a second volatile memory device. In certain examples, the first plurality of pages does not include data from the second data lane.

Abstract: Apparatus and methods are provided for operating a non-volatile memory module. In an example, a method can include filling a first plurality of pages of a first non-volatile memory with first data from a first data lane that includes a first volatile memory device, and filling a second plurality of pages of the first non-volatile memory device with second data from a second data lane that includes a second volatile memory device. In certain examples, the first plurality of pages does not include data from the second data lane.

Abstract: Embodiments described herein are related to performing virtual application delivery. In some embodiments, a method includes accessing, at a computing device, a datastore comprising a first virtual disk file mapped to a plurality of virtual disk files separate from the first virtual disk file, wherein each of the plurality of virtual disk files comprises at least one application stored thereon. The method further includes receiving, at the computing device, one or more operations for accessing the first virtual disk file, the one or more operations corresponding to a first application stored on a second virtual disk file of the plurality of virtual disk files. The method further includes redirecting the one or more operations for accessing the first virtual disk file to the second virtual disk file.

Abstract: Apparatus and methods are provided for operating a non-volatile memory module. In an example, a method can include filling a first plurality of pages of a first non-volatile memory with first data from a first data lane that includes a first volatile memory device, and filling a second plurality of pages of the first non-volatile memory device with second data from a second data lane that includes a second volatile memory device. In certain examples, the first plurality of pages does not include data from the second data lane.

Abstract: Apparatus and methods are provided for operating a non-volatile memory module. In an example, a method can include filling a first plurality of pages of a first non-volatile memory with first data from a first data lane that includes a first volatile memory device, and filling a second plurality of pages of the first non-volatile memory device with second data from a second data lane that includes a second volatile memory device. In certain examples, the first plurality of pages does not include data from the second data lane.

Abstract: Apparatus and methods are provided for operating a non-volatile memory module. In an example, a method can include filling a first plurality of pages of a first non-volatile memory with first data from a first data lane that includes a first volatile memory device, and filling a second plurality of pages of the first non-volatile memory device with second data from a second data lane that includes a second volatile memory device. In certain examples, the first plurality of pages does not include data from the second data lane.

Abstract: Apparatus and methods are provided for operating a non-volatile memory module. In an example, a method can include filling a first plurality of pages of a first non-volatile memory with first data from a first data lane that includes a first volatile memory device, and filling a second plurality of pages of the first non-volatile memory device with second data from a second data lane that includes a second volatile memory device. In certain examples, the first plurality of pages does not include data from the second data lane.