Patents by Inventor Jonathan S. Turner

Jonathan S. Turner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10806655
    Abstract: The present disclosure relates to patient support systems, such as hospital beds, and particularly to reconfigurable patient support systems movable among a number of different positions. The present disclosure further relates to control algorithms and interfaces for use in patient support systems.
    Type: Grant
    Filed: October 16, 2017
    Date of Patent: October 20, 2020
    Assignee: Hill-Rom Services, Inc.
    Inventors: Eric R. Meyer, Darrell Borgman, Timothy Joseph Receveur, Gregory W. Branson, Sandy Mark Richards, Howard J. Boyd, David W. Hornbach, Robert Mark Zerhusen, James Maurice Allen, Jennifer Fearing, Mark S. Chiacchira, Jonathan D. Turner, Mark Lanning, Aziz A Bhai
  • Publication number: 20200323717
    Abstract: A patient support apparatus includes a base frame, lift mechanism supporting an upper frame relative to the base frame, a load frame, and a plurality of deck sections, a patient support surface, and a number of barriers positioned about the patient supporting surface. The patient support apparatus includes a notification system for visually notifying a caregiver of a condition or status of a component of the patient support apparatus.
    Type: Application
    Filed: December 26, 2019
    Publication date: October 15, 2020
    Inventors: Robert M. ZERHUSEN, Richard H. HEIMBROCK, Arpit SHAH, Aziz A. BHAI, Bradley T. SMITH, Catherine M. WAGNER, Charles A. LACHENBRUCH, Clay G. OWSLEY, Dan R. TALLENT, Daniel NACHTIGAL, David L. BEDEL, David J. BRZENCHEK, David J. HITCHCOCK, David P. LUBBERS, Douglas A. SEIM, Douglas E. BORGMAN, Eric D. BENZ, Florin IUCHA, Frank E. SAUSER, Gavin M. MONSON, James W. PASCOE, James L. WALKE, Jared RUDE, John G. BYERS, John D. CHRISTIE, Jonathan D. TURNER, Joshua A. WILLIAMS, Karen LANNING, Kathryn SMITH, Kirsten M. EMMONS, Mary Kay BRINKMAN, Michael BUCCIERI, Nathaniel W. HIXON, Neal WIGGERMANN, Richard J. SCHUMAN, SR., Scott M. CORBIN, Sravan MAMIDI, Todd P. O'NEAL, Todd S. VENTROLA, Travis PELO, Unnati OJHA, John GOEWERT
  • Publication number: 20200033685
    Abstract: A multi-layer device comprising a first substrate and a first electrically conductive layer on a surface thereof, the first electrically conductive layer having a sheet resistance to the flow of electrical current through the first electrically conductive layer that varies as a function of position.
    Type: Application
    Filed: October 7, 2019
    Publication date: January 30, 2020
    Inventors: Howard S. Bergh, John David Bass, Jonathan Ziebarth, Nicolas Timmerman, Zachariah Hogan, Karin Yaccato, Howard W. Turner
  • Patent number: 10437128
    Abstract: A multi-layer device comprising a first substrate and a first electrically conductive layer on a surface thereof, the first electrically conductive layer having a sheet resistance to the flow of electrical current through the first electrically conductive layer that varies as a function of position.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: October 8, 2019
    Assignee: Kinestral Technologies, Inc.
    Inventors: Howard S. Bergh, John David Bass, Jonathan Ziebarth, Nicolas Timmerman, Zachariah Hogan, Karin Yaccato, Howard W. Turner
  • Patent number: 7106693
    Abstract: Methods and apparatuses are disclosed for pacing the rate at which packets of one or more information streams are sent from a device, such as, for example, a workstation, computer, communications mechanism, or component thereof. Typically, multiple timing wheels each having a different timing granularity are used to schedule the transmission of packets of information corresponding the to the information streams. Using multiple timing wheels in this manner allows scheduling of a larger range of rates while typically using a significantly smaller amount of memory than a single timing wheel covering the same range of rates. An entry, corresponding to a next portion of an information stream to be sent from the device, is inserted into the timing wheels at a target time for sending the information. At the target time, the entry is removed and placed in a transmit list of items to be sent from the device. In one implementation a single transmit list is used for all timing wheels.
    Type: Grant
    Filed: November 2, 2000
    Date of Patent: September 12, 2006
    Assignees: Cisco Technology, Inc., Washington University
    Inventors: Jonathan S. Turner, Jerome R. Cox
  • Patent number: 7027397
    Abstract: Methods and apparatus are disclosed for accumulating traffic information and distributing flow control information in a packet switching system. Traffic information is collected in multiple elements and indications of congestion and/or other types of information useful in determining traffic conditions are forwarded to collecting elements. The collecting elements manipulate the received indications and generate flow control messages which are sent to individual sending components. In one implementation, a switching element maintains for each destination a count of packets within itself which are addressed to the particular destination. Indications of this collected information are sent to collecting switching elements. These collecting elements accumulate the information received from multiple sources. The accumulated information is evaluated, and when a congestion condition is located or anticipated, then flow control messages are distributed to all, or a subset of, the packet sources.
    Type: Grant
    Filed: February 15, 2001
    Date of Patent: April 11, 2006
    Assignee: Cisco Technology, Inc.
    Inventors: Jonathan S. Turner, Zubin D. Dittia, Thomas Dejanovic
  • Patent number: 7012889
    Abstract: Methods and apparatuses are disclosed for controlling the rate at which packets are sent from a first to a second component of a packet switching system. In one implementation, the first component represents an input line card to a packet switch, and the second component represents an output of the packet switch. In such a system, a state is maintained for each output at each line card. For example, these states may include an unconstrained state during which traffic is sent at a full rate to the output, an off state during which no traffic is sent to the output, and a constrained state during which traffic is sent at a reduced rate to the output. Typically, this reduced rate is proportional to the arrival rate of packets at the input line card which are destined for the output. The state of the output is changed based on received flow control information about the output and whether traffic remains queued for the output at the input line card.
    Type: Grant
    Filed: November 2, 2000
    Date of Patent: March 14, 2006
    Assignee: Cisco Technology, Inc.
    Inventors: Jonathan S. Turner, Zubin D. Dittia
  • Patent number: 6990063
    Abstract: Methods and apparatus are disclosed for distributing fault indications and maintaining and using a data structure indicating faults to route traffic in a packet switching system. In one embodiment, a packet switching system detects faults and propagates indications of these faults to the input interfaces of a packet switch, so the packet switch can adapt the selection of a route over which to send a particular packet. Faults are identified by various components of the packet switching system and relayed to one or more switching components to generate a broadcast packet destined for all input ports (i.e., to each I/O interface in a packet switch having folded input and output interfaces). Other embodiments, generate one or more multicast or unicast packets. The I/O interface maintains one or more data structures indicating the state of various portions of the packet switching system.
    Type: Grant
    Filed: March 7, 2000
    Date of Patent: January 24, 2006
    Assignees: Cisco Technology, Inc., Washington University
    Inventors: Daniel E. Lenoski, William N. Eatherton, John Andrew Fingerhut, Jonathan S. Turner
  • Patent number: 6907041
    Abstract: Methods and apparatus for forwarding packets in a multistage interconnection network are provided which timestamp packets using a substantially system-wide timing reference and a merge sorting variant to restore packets to the proper order, using the timestamp information carried in the packets. One implementation determines when packets passing along different paths in the network can be safely forwarded, even when no packets have recently been received on some of the paths, by forwarding status messages along otherwise idle paths. The status messages provide information that can be used by downstream components to allow them to determine when packets passing over other paths can safely be forwarded. One implementation simultaneously resequences packets being delivered to all n outputs of the multistage interconnection network. The resequencing operations are distributed among a plurality of switching elements making up the interconnection network.
    Type: Grant
    Filed: March 7, 2000
    Date of Patent: June 14, 2005
    Assignees: Cisco Technology, Inc., Washington University
    Inventors: Jonathan S. Turner, Zubin D. Dittia, John Andrew Fingerhut
  • Patent number: 6816492
    Abstract: Methods and apparatus are disclosed for propagating timestamp floors throughout a packet switching system and using the timestamp floors received at a first component of the packet switching system to determine when a packet may be sent from a packet switching system. Each input of a first stage of a packet switching system maintains a floor register which is updated by copying the timestamp from each arriving packet. In some systems, if a packet is not received during a packet time, the timestamp is automatically updated, typically by adding a fixed time value. Periodically, the first stage switching element forwards a timestamp floor to the next stage switching elements. In one implementation, this distributed timestamp floor is the lesser of the earliest timestamp in one of the floor registers in the input queues, and the earliest timestamp in an output queue for the particular next stage switching element.
    Type: Grant
    Filed: July 31, 2000
    Date of Patent: November 9, 2004
    Assignee: Cisco Technology, Inc.
    Inventors: Jonathan S. Turner, Daniel E. Lenoski
  • Patent number: 6788689
    Abstract: Connection distributors are used to route packets corresponding to multiple streams of packets through a packet switching system. During each time slot, one packet is typically sent from each packet stream. During the configuration of a packet stream, a time slot and primary route is determined for the packet stream. The primary route is a route through the packet switch which is non-blocking with other packet streams during the assigned time slot. During a common frame, a packet of each packet stream is sent out of a line card or packet interface to be routed through the packet switch over the designated primary route. During subsequent frames, packets are sent over different routes through the network (until all routes are used and then the cycle repeats). These routes are selected based on a deterministic method so as to maintain the non-blocking characteristic of the primary route selection.
    Type: Grant
    Filed: March 7, 2000
    Date of Patent: September 7, 2004
    Assignee: Cisco Technology, Inc.
    Inventors: Jonathan S. Turner, Michael B. Galles
  • Patent number: 6735173
    Abstract: Methods and apparatus are disclosed for accumulating and distributing information in a packet switching system. For example, it is desirable in certain packet switching systems to communicate the status of internal queues and other port status information from an individual port to all other ports (or at least those which are communicating with the individual port). The amount of information being sent from the individual port is typically very small, such as on the order of a few bits or bytes. By accumulating the information and then broadcasting the collected flow control information, a vast amount of switch fabric resources (e.g., bandwidth) can be saved. In one implementation, flow control information is sent to a destination (e.g., a “mailbox”) within a packet switching fabric which includes a memory in which flow control information is accumulated. After a period of time or based on the occurrence of some event, the accumulated flow control information is distributed.
    Type: Grant
    Filed: March 7, 2000
    Date of Patent: May 11, 2004
    Assignee: Cisco Technology, Inc.
    Inventors: Daniel E. Lenoski, Jonathan S. Turner
  • Patent number: 6728211
    Abstract: Methods and apparatus are also disclosed for responding to received flow control messages indicating a previously congested port is now in a non-congested state. Many different components that have packets to send to a particular output will receive an indication that they are now allowed to send these packets at roughly the same time as the other components. If all components start sending at the same time, then the packet switch might become congested, possibly very quickly. If the packet switch cannot respond and transmit flow control messages to all of these sources fast enough, certain internal buffers could overflow and thus packets might be lost. On implementation causes components to start sending to the destination at varying times to gradually increase the traffic being sent to the destination.
    Type: Grant
    Filed: March 7, 2000
    Date of Patent: April 27, 2004
    Assignee: Cisco Technology, Inc.
    Inventors: Vinod Gerard John Peris, Jonathan S. Turner, Zubin D. Dittia, William N. Eatherton
  • Patent number: 6674721
    Abstract: Methods and apparatus are disclosed for determining the order to send information arriving at the inputs of a packet switching system. A line card maintains its own data structure indicating flow control information and a queue for each destination it is sending data with its memory. Control logic then controls the placing of the incoming data into these queues and for taking the data out of the queues and sending the data, typically in the form of packets, to the packet switch. As information arrives at a line card, priority outgoing packet time slots are allocated for that destination. In this manner, each destination is given the opportunity to send information at its arrival rate. In the remaining bandwidth or packet cycles available on the outgoing link, the destination queues containing information retained due to a congestion condition are serviced.
    Type: Grant
    Filed: March 7, 2000
    Date of Patent: January 6, 2004
    Assignee: Cisco Technology, Inc.
    Inventors: Zubin D. Dittia, Jonathan S. Turner
  • Patent number: 6654342
    Abstract: Methods and apparatus are disclosed for accumulating and distributing flow control information via update messages and piggybacked flow control information in other messages. One implementation operates using at least two techniques. Using a first technique, for every packet entering the switching system from a line card, the switching system conveys flow control information (typically congestion or both congestion and no-congestion indications) for the packet's destination to the line card. Using a second technique, the switching system will periodically convey congestion and no-congestion indications for all destinations to the line cards. In one implementation, when the first technique is used to provide only congestion indications, the periodic distribution of flow control information using the second technique provides non-congested indications which allows the line cards and their sources to resume or begin sending to the non-congested destinations.
    Type: Grant
    Filed: March 7, 2000
    Date of Patent: November 25, 2003
    Assignee: Cisco Technology, Inc.
    Inventors: Zubin D. Dittia, William N. Eatherton, John Andrew Fingerhut, Michael B. Galles, Jonathan S. Turner
  • Patent number: 5402415
    Abstract: Multicasting is implemented in a virtual circuit switch for an ATM network by recycling data cells through the switch fabric a multiple number of times with a copy-by-two network creating an additional data cell upon each recycle to thereby satisfy the number of connection addresses in the multicast connection. Resequencing of the data cells may be implemented at the exit to the switch fabric as well as upon each recycle of data cells through the switch fabric.
    Type: Grant
    Filed: April 22, 1993
    Date of Patent: March 28, 1995
    Assignee: Washington University
    Inventor: Jonathan S. Turner
  • Patent number: 5339311
    Abstract: A resequencing buffer and buffer control circuit is disclosed for resequencing data packets into their timed sequence after traversing a switch fabric which can introduce a misordering of data packets because of the varying time intervals required for data packets to traverse the switch fabric in a non-blocking manner. The resequencing buffer controller includes a plurality of hi-directional shift registers for storing each data packet's age and slot number, each bi-directional shift register having an associated slot control circuit for feeding the age and slot number one bit at a time onto a contention bus to thereby determine the oldest data packet eligible for transmission. The contention bus is an exclusive OR wire bus which interconnects the slot control circuits and an output circuit which controls the buffer to output the slot number containing the data packet of oldest age.
    Type: Grant
    Filed: January 19, 1993
    Date of Patent: August 16, 1994
    Assignee: Washington University
    Inventor: Jonathan S. Turner
  • Patent number: 5260935
    Abstract: A resequencing buffer and buffer control circuit is disclosed for resequencing data packets into their timed sequence after traversing a switch fabric which can introduce a misordering of data packets because of the varying time intervals required for data packets to traverse the switch fabric in a non-blocking manner. The resequencing buffer controller includes a plurality of bi-directional shift registers for storing each data packet's age and slot number, each bi-directional shift register having an associated slot control circuit for feeding the age and slot number one bit at a time onto a contention bus to thereby determine the oldest data packet eligible for transmission. The contention bus is an exclusive OR wire bus which interconnects the slot control circuits and an output circuit which controls the buffer to output the slot number containing the data packet of oldest age.
    Type: Grant
    Filed: March 1, 1991
    Date of Patent: November 9, 1993
    Assignee: Washington University
    Inventor: Jonathan S. Turner
  • Patent number: 5229991
    Abstract: A packet switch having broadcasting capability for an ATM network includes a copy network stage having an increased number of copy outputs over the number of switch inputs and outputs to improve data throughput under worst case conditions, broadcast translation circuits with inputs connected to a multiple number of copy network outputs for multiplexing the data packets therethrough, partitioned memories for the broadcast translation circuits to reduce their memory requirements, and techniques for aligning broadcast copies of data packets for minimizing the number of copies each BTC must translate and thereby reduce each of their memories. All of these enhancements to a prior art broadcast ATM switch substantially reduce its memory requirements to thereby enable broadcasting in an ATM switch to be practically realized.
    Type: Grant
    Filed: January 30, 1991
    Date of Patent: July 20, 1993
    Assignee: Washington University
    Inventor: Jonathan S. Turner
  • Patent number: 5179551
    Abstract: A multi-cast switching system comprised of a pair of high speed data networks, each of said data networks being either a Benes network, a Clos network, or a Cantor network, and configured to provide point-to-point switching only in the first network and multi-cast switching in the second network, may be non-blocking for adding a multi-cast connection and re-arrangeably non-blocking for augmenting an existing multi-cast connection using the algorithm which essentially consists of identifying the most lightly loaded middle stage switch, connecting the input to the middle stage switch, and connecting the outputs to the middle stage switch. A minimal speed advantage for each type of network is presented and thereby reduces the cost of each network in order to achieve non-blocking operation.
    Type: Grant
    Filed: April 8, 1991
    Date of Patent: January 12, 1993
    Assignee: Washington University
    Inventor: Jonathan S. Turner