Patents by Inventor Jonathan San

Jonathan San has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11940483
    Abstract: Systems, devices and methods for high-speed I/O margin testing can screen high volumes of pre-production and production parts and identify cases where the electrical characteristics have changed enough to impact operation. The margin tester disclosed is lower cost, easier to use and faster than traditional BERT and scopes and can operate on the full multi-lane I/O links in their standard operating states with full loading and cross-talk. The margin tester assesses the electrical receiver margin of an operation multi-lane high speed I/O link with a device under test simultaneously in either or both directions. In a technology-specific form, an embodiment of the margin tester can be implemented as an add-in card margin tester to test motherboard slots of a mother board under test, or as a as a motherboard with slots to test add-in cards.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: March 26, 2024
    Assignee: Tektronix, Inc.
    Inventors: Sam J. Strickling, Daniel S. Froelich, Michelle L Baldwin, Jonathan San, Lin-Yung Chen
  • Publication number: 20240004768
    Abstract: A test and measurement system has a test and measurement instrument having an adaptor with an interface configured to communicate through one or more communications links with a new device under test to receive new test results, a memory configured to store a database of test results and a database of analyzed test results related to tests performed with one or more prior devices under test, a data analyzer connected to the test and measurement instrument through the one or more communications link, the data analyzer configured to analyze the new test results based on the stored test results, and a health score generator configured to generate a health score for the new device under test based on the analysis from the data analyzer.
    Type: Application
    Filed: September 14, 2023
    Publication date: January 4, 2024
    Applicant: Tektronix, Inc.
    Inventors: Sam J. Strickling, Daniel S. Froelich, Michelle L. Baldwin, Jonathan San, Lin-Yung Chen
  • Patent number: 11782809
    Abstract: A test and measurement system for analyzing a device under test, including a database configured to store test results related to tests performed with one or more prior devices under test, a receiver to receive new test results about a new device under test, a data analyzer configured to analyze the new test results based on the stored test results, and a health score generator configured to generate a health score for the new device under test based on the analysis from the data analyzer.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: October 10, 2023
    Assignee: Tektronix, Inc.
    Inventors: Sam J. Strickling, Daniel S. Froelich, Michelle L. Baldwin, Jonathan San, Lin-Yung Chen
  • Publication number: 20220091185
    Abstract: A margin tester including an identification reader configured to receive an adaptor identifier of an adaptor, an interface configured to connect to a device under test through the adaptor, and one or more processors configured to assess a margin, such as an electrical margin or an optical margin, of a device under test and tag the assessment with the adaptor identifier. Assessing the margin can include assessing the margin based on an expected margin that is predicted or provided based on the adaptor identifier.
    Type: Application
    Filed: August 13, 2021
    Publication date: March 24, 2022
    Applicant: Tektronix, Inc.
    Inventors: Sam J. Strickling, Daniel S. Froelich, Michelle L. Baldwin, Jonathan San, Lin-Yung Chen
  • Publication number: 20220034975
    Abstract: A cable structured to be repeatedly connected to a device, each repeated connection causing degradation of the cable, the cable including a condition indicator disposed on the cable and configured to be updated with each successive connection of the cable into the device.
    Type: Application
    Filed: July 27, 2021
    Publication date: February 3, 2022
    Applicant: Tektronix, Inc.
    Inventors: Sam J. Strickling, Daniel S. Froelich, Michelle L. Baldwin, Jonathan San, Lin-Yung Chen
  • Publication number: 20220034967
    Abstract: A calibrated test and measurement cable for connecting one or more devices under test and a test and measurement instrument, including a first port structured to electrically connect to a first signal lane, a second port structured to electrically connect to a second signal lane, a third port structured to electrically connect to a test and measurement instrument, and a multiplexer configured to switch between electrically connecting the first port to the third port and connected the second port to the third port. The first and second signal lanes can be included on the same device under test or different devices under test. An input can receive instructions to operate the multiplexer.
    Type: Application
    Filed: July 14, 2021
    Publication date: February 3, 2022
    Applicant: Tektronix, Inc.
    Inventors: Sam J. Strickling, Daniel S. Froelich, Michelle L. Baldwin, Jonathan San, Lin-Yung Chen, Shane A. Hazzard
  • Publication number: 20210406144
    Abstract: A test and measurement system for analyzing a device under test, including a database configured to store test results related to tests performed with one or more prior devices under test, a receiver to receive new test results about a new device under test, a data analyzer configured to analyze the new test results based on the stored test results, and a health score generator configured to generate a health score for the new device under test based on the analysis from the data analyzer.
    Type: Application
    Filed: June 25, 2021
    Publication date: December 30, 2021
    Applicant: Tektronix, Inc.
    Inventors: Sam J. Strickling, Daniel S. Froelich, Michelle L. Baldwin, Jonathan San, Lin-Yung Chen
  • Publication number: 20210405108
    Abstract: Systems, devices and methods for high-speed I/O margin testing can screen high volumes of pre-production and production parts and identify cases where the electrical characteristics have changed enough to impact operation. The margin tester disclosed is lower cost, easier to use and faster than traditional BERT and scopes and can operate on the full multi-lane I/O links in their standard operating states with full loading and cross-talk. The margin tester assesses the electrical receiver margin of an operation multi-lane high speed I/O link with a device under test simultaneously in either or both directions. In a technology-specific form, an embodiment of the margin tester can be implemented as an add-in card margin tester to test motherboard slots of a mother board under test, or as a as a motherboard with slots to test add-in cards.
    Type: Application
    Filed: September 9, 2021
    Publication date: December 30, 2021
    Applicant: Tektronix, Inc.
    Inventors: Sam J. Strickling, Daniel S. Froelich, Michelle L. Baldwin, Jonathan San, Lin-Yung Chen
  • Publication number: 20210297882
    Abstract: Systems and methods for automated recognition of a device under test and retrieving data associated with the device under test based on the recognition. The systems and methods include receiving a recognition key based on an identifying characteristic of the device under test, matching the received recognition key to a stored key in a database, retrieving data related to the stored key when the received recognition key matches the stored key, transmitting instructions to perform an action on a test and measurement device based on the retrieved data, receiving new data related to the device under test, and updating the data in the database related to the stored key with the new data.
    Type: Application
    Filed: March 19, 2021
    Publication date: September 23, 2021
    Applicant: Tektronix, Inc.
    Inventors: Sam J. Strickling, Andrew McCann, Daniel S. Froelich, Michelle L. Baldwin, Jonathan San, Lin-Yung Chen
  • Patent number: 9573552
    Abstract: An airbag apparatus for a vehicle including an airbag stored in a folded state in a portion of a vehicle body and an inflator that provides a gas for inflating the airbag. The airbag including a main chamber and a delay chamber. The main chamber operable to be inflated earlier than the delay chamber. The delay chamber including an opening through which the gas passes from the main chamber to the delay chamber; and the delay chamber further including a weakened portion having less strength than the opening.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: February 21, 2017
    Assignee: Toyota Motor Engineering & Manufacturing North America, Inc.
    Inventors: Nora Arellano, Jonathan San, Jessica Riffe
  • Publication number: 20140375037
    Abstract: An airbag apparatus for a vehicle including an airbag stored in a folded state in a portion of a vehicle body and an inflator that provides a gas for inflating the airbag. The airbag including a main chamber and a delay chamber. The main chamber operable to be inflated earlier than the delay chamber. The delay chamber including an opening through which the gas passes from the main chamber to the delay chamber; and the delay chamber further including a weakened portion having less strength than the opening.
    Type: Application
    Filed: June 19, 2013
    Publication date: December 25, 2014
    Inventors: Nora Arellano, Jonathan San, Jessica Riffe
  • Patent number: 8874925
    Abstract: A computer-implemented method to scan memory for a threat is described. At least one application programming interface (API) is monitored. A back-trace operation is performed from the at least one API to identify a process that called the at least one API. An address in memory is retrieved for the identified process. At least a portion of the memory associated with the address of the identified process is scanned. A signature based on the scanned portion of the memory is generated.
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: October 28, 2014
    Assignee: Symantec Corporation
    Inventors: Rei Resurreccion, Jonathan San Jose
  • Patent number: 8839428
    Abstract: A computer-implemented method to detect malicious code in a script attack, is described. An activity associated with calling a function is detected. An operation code set associated with the activity to call the function is identified. A predetermined sequence of characters included in the operation code set is identified. The identified predetermined sequence of characters is analyzed. The operation code set is classified as malicious or non-malicious based on the analysis of the predetermined sequence of characters.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: September 16, 2014
    Assignee: Symantec Corporation
    Inventors: Ian Oliver, Jonathan San Jose