Patents by Inventor Jonathan Shi

Jonathan Shi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240414148
    Abstract: This disclosure relates to a context enforcement system that efficiently and securely protects tenant context information that travels across microservices in a multi-tenant distributed cloud computing system and protects against data leaks that often occur in conventional microservice management systems. For example, the context enforcement system ensures secure external and internal communications and context isolation by providing various shared library functions to microservices of a multi-tenant distributed cloud computing system. Additionally, the shared library provided by the context enforcement system improves the efficiency of the multi-tenant distributed cloud computing system by allowing microservices to focus on target operations rather than also maintaining and performing additional redundant functions.
    Type: Application
    Filed: June 12, 2023
    Publication date: December 12, 2024
    Inventors: Suyin LIU, Jie LIU, Na LI, Yizhong WU, Chuanbo ZHANG, Xiangyi DENG, Yiteng YU, Yu ZHANG, Yu XIA, Jonathan SHI
  • Publication number: 20230400860
    Abstract: System and methods for enabling a mobile robot for autonomous missions are described. Despite some mobile robots having the capability of safely traversing complex terrains, mobile robots still behave like a typical machine which can only respond to a human's commands via an interactive controller. For example, a human will drive the mobile robot to desired locations, position it, and activate actions as desired in order to complete a mission. As such, it is desirable to enable a mobile robot with the capability of executing and completing a mission without a human's involvement. The present disclosures includes innovative technology which enables an ordinary user to quickly define a complex mission in the form that a mobile robot can understand and automatically execute it accordingly.
    Type: Application
    Filed: June 8, 2023
    Publication date: December 14, 2023
    Inventor: Jonathan Shi
  • Patent number: 6359824
    Abstract: The present invention discloses a method and system for activating a plurality of wordline decoder circuits to transfer a predetermined high voltage to a plurality of wordlines during a test mode in a memory device. A plurality of wordline voltage supply circuits supply voltage for the wordlines. During operation, when the memory device is placed in a test mode requiring application of the predetermined high voltage to the wordlines, the wordline decoder circuits are activated. In addition, a first predetermined voltage that is approximately zero volts is supplied by the wordline voltage supply circuits to the wordline decoder circuits for a first predetermined amount of time. Once the wordline decoder circuits decode the respective wordlines, the first predetermined voltage is transferred to the respective wordlines.
    Type: Grant
    Filed: June 9, 2000
    Date of Patent: March 19, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Colin S. Bill, Jonathan Shi-Chang Su, Feng Pan
  • Patent number: 6088287
    Abstract: The present invention discloses a memory wordline decoder that includes a plurality of pre-decoded address lines that are electrically connected with a global x-decoder. A sub x-decoder is electrically connected with the global x-decoder for receiving electrical control signals from the global x-decoder. A memory sector is electrically connected with the sub x-decoder. The global x-decoder selectively controls the sub x-decoder to select a plurality of wordlines in the memory sector. A vertical x-decoder is electrically connected with the global x-decoder and the sub x-decoder. The vertical x-decoder is used to select a predetermined wordline by the global x-decoder during operation.
    Type: Grant
    Filed: August 23, 1999
    Date of Patent: July 11, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Colin S. Bill, Jonathan Shi-Chang Su, Ravi P. Gutala
  • Patent number: 6046932
    Abstract: A method of and a flash memory device for quenching bitline leakage current during programming and over-erase correction operations. The flash memory cells are organized in an array of I/O blocks with each block having columns and rows. An array of resistors is connected between the common array source connection and ground. The array of resistors is made up of sets of resistors, each set having a programming mode resistor and an APDE mode resistor. A data buffer switches either a programming mode resistor or APDE mode resistor into the circuit when a bitline is selected for either programming or APDE. The values of the resistors are selected to raise the voltage at the source above a selected threshold voltage of the memory cells so that over-erased cells will not provide leakage current to the bitline during either programming or APDE.
    Type: Grant
    Filed: October 13, 1999
    Date of Patent: April 4, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Colin Bill, Sameer S. Haddad, Jonathan Shi-Chang Su, Vei-Han Chan