Abstract: An apparatus for biasing a transistor, comprising: a controllable bias generator; a test circuit; a digital Mth order differentiator responsive to an output of the test circuit; and a controller responsive to the digital Mth order differentiator for controlling the controllable bias generator; wherein the test circuit is configured to calculate an Lth order derivative of the transistor's performance.

Abstract: An apparatus for biasing a transistor, comprising: a controllable bias generator; a test circuit; a digital Mth order differentiator responsive to an output of the test circuit; and a controller responsive to the digital Mth order differentiator for controlling the controllable bias generator; wherein the test circuit is configured to calculate an Lth order derivative of the transistor's performance.

Abstract: An apparatus for compensating for variations in loop gain of a phase locked loop as a function of frequency, comprising a correction calculator for introducing a loop gain correction as a function of target frequency of a oscillator controlled by the phase locked loop.

Abstract: A mixer core is provided which has a pair of CMOS transistors 21 and 22 connected as a matched pair and having a common source node N1. The CMOS transistors have a non-linear parasitic capacitance which degrades the harmonic performance of the mixer core. An inductor is connected to the common source node and optionally to ground, a signal input node or to a further common source node when the mixer core is part of a double balanced mixer. The inductor is chosen such that it co-operates with the parasitic capacitors to form a resonant circuit tuned to the local oscillator frequency or optionally a harmonic of it, such as the second harmonic, or to the input signal frequency.

Abstract: A phase-locked loop frequency synthesizer has a charge pump, phase-locked loop filter, voltage-controlled oscillator, and a bandwidth calibration circuit. The bandwidth calibration circuit measures the gain of the voltage-controlled oscillator and uses the measured voltage-controlled oscillator gain to adjust the charge pump level. The charge pump level is adjusted so that a product of the voltage-controlled oscillator gain and the measured charge pump level results in a constant phase-locked loop bandwidth.

Abstract: A frequency agile voltage controlled oscillator is provided in which amplitude control is performed by digitally controlling the current supplied to the oscillator from a current source (10). The use of digital control means that phase noise performance of the oscillator is not degraded by the introduction of noise from the current source controller.