Patents by Inventor Jonathan Tehan CHEN
Jonathan Tehan CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11556414Abstract: A method includes: retrieving a first word comprising a plurality of data bits and a plurality of parity bits that correspond to the first word, wherein the plurality of data bits form N?1 groups and the plurality of parity bits form a first group different from the N?1 groups, and N is a positive integer greater than 2; receiving a request to update respective data bits of a first one of the N?1 groups; and providing a second word comprising updated data bits that form a second one of the N?1 groups and a plurality of updated parity bits that correspond to the second word, wherein the plurality of updated parity bits form a second group that has a same group index as the first one of the N?1 groups.Type: GrantFiled: April 5, 2021Date of Patent: January 17, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chien-Yin Liu, Yu-Der Chih, Hsueh-Chih Yang, Jonathan Tehan Chen, Kuan-Chun Chen
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Publication number: 20210224154Abstract: A method includes: retrieving a first word comprising a plurality of data bits and a plurality of parity bits that correspond to the first word, wherein the plurality of data bits form N?1 groups and the plurality of parity bits form a first group different from the N?1 groups, and N is a positive integer greater than 2; receiving a request to update respective data bits of a first one of the N?1 groups; and providing a second word comprising updated data bits that form a second one of the N?1 groups and a plurality of updated parity bits that correspond to the second word, wherein the plurality of updated parity bits form a second group that has a same group index as the first one of the N?1 groups.Type: ApplicationFiled: April 5, 2021Publication date: July 22, 2021Inventors: Chien-Yin LIU, Yu-Der CHIH, Hsueh-Chih YANG, Jonathan Tehan CHEN, Kuan-Chun CHEN
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Patent number: 10970167Abstract: A method includes: retrieving a first word comprising a plurality of data bits and a plurality of parity bits that correspond to the first word, wherein the plurality of data bits form N?1 groups and the plurality of parity bits form a first group different from the N?1 groups, and N is a positive integer greater than 2; receiving a request to update respective data bits of a first one of the N?1 groups; and providing a second word comprising updated data bits that form a second one of the N?1 groups and a plurality of updated parity bits that correspond to the second word, wherein the plurality of updated parity bits form a second group that has a same group index as the first one of the N?1 groups.Type: GrantFiled: January 15, 2020Date of Patent: April 6, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chien-Yin Liu, Yu-Der Chih, Hsueh-Chih Yang, Jonathan Tehan Chen, Kuan-Chun Chen
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Publication number: 20200151057Abstract: A method includes: retrieving a first word comprising a plurality of data bits and a plurality of parity bits that correspond to the first word, wherein the plurality of data bits form N?1 groups and the plurality of parity bits form a first group different from the N?1 groups, and N is a positive integer greater than 2; receiving a request to update respective data bits of a first one of the N?1 groups; and providing a second word comprising updated data bits that form a second one of the N?1 groups and a plurality of updated parity bits that correspond to the second word, wherein the plurality of updated parity bits form a second group that has a same group index as the first one of the N?1 groups.Type: ApplicationFiled: January 15, 2020Publication date: May 14, 2020Inventors: Chien-Yin Liu, Yu-Der Chih, Hsueh-Chih Yang, Jonathan Tehan Chen, Kuan-Chun Chen
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Patent number: 10599517Abstract: A method includes: retrieving a first word comprising a plurality of data bits and a plurality of parity bits that correspond to the first word, wherein the plurality of data bits form N?1 groups and the plurality of parity bits form a first group different from the N?1 groups, and N is a positive integer greater than 2; receiving a request to update respective data bits of a first one of the N?1 groups; and providing a second word comprising updated data bits that form a second one of the N?1 groups and a plurality of updated parity bits that correspond to the second word, wherein the plurality of updated parity bits form a second group that has a same group index as the first one of the N?1 groups.Type: GrantFiled: April 28, 2018Date of Patent: March 24, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chien-Yin Liu, Yu-Der Chih, Hsueh-Chih Yang, Jonathan Tehan Chen, Kuan-Chun Chen
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Publication number: 20190163568Abstract: A method includes: retrieving a first word comprising a plurality of data bits and a plurality of parity bits that correspond to the first word, wherein the plurality of data bits form N?1 groups and the plurality of parity bits form a first group different from the N?1 groups, and N is a positive integer greater than 2; receiving a request to update respective data bits of a first one of the N?1 groups; and providing a second word comprising updated data bits that form a second one of the N?1 groups and a plurality of updated parity bits that correspond to the second word, wherein the plurality of updated parity bits form a second group that has a same group index as the first one of the N?1 groups.Type: ApplicationFiled: April 28, 2018Publication date: May 30, 2019Inventors: Chien-Yin LIU, Yu-Der CHIH, Hsueh-Chu YANG, Jonathan Tehan CHEN, Kuan-Chun CHEN
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Patent number: 9985203Abstract: The present disclosure provides resistive random access memory (RRAM) structures and methods of making the same. The RRAM structures include a bottom electrode having protruded step portion that allows formation of a self-aligned conductive path with a top electrode during operation. The protruded step portion may have an inclination angle of about 30 degrees to 150 degrees. Multiple RRAM structures may be formed by etching through a RRAM stack.Type: GrantFiled: November 15, 2013Date of Patent: May 29, 2018Assignee: Taiwan Semiconductor Manufacturing CompanyInventors: Jonathan Tehan Chen, Chung-Cheng Chou, Po-Hao Lee, Kuo-Chi Tu
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Patent number: 9922962Abstract: A system and method of cooling a three dimensional integrated circuit (3D IC) using at least one thermoelectric cooler which is connected to the 3D IC by a plurality of conductive pillars. In some embodiments a controller controls power supply to the thermoelectric cooler, and a temperature monitor provides a temperature input to the controller. In some embodiments the controller maintains a temperature of a 3D IC within a predetermined range by cycling power to the thermoelectric cooler.Type: GrantFiled: April 12, 2017Date of Patent: March 20, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chung-Cheng Chou, Po-Hao Lee, Jonathan Tehan Chen
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Publication number: 20170221862Abstract: A system and method of cooling a three dimensional integrated circuit (3D IC) using at least one thermoelectric cooler which is connected to the 3D IC by a plurality of conductive pillars. In some embodiments a controller controls power supply to the thermoelectric cooler, and a temperature monitor provides a temperature input to the controller. In some embodiments the controller maintains a temperature of a 3D IC within a predetermined range by cycling power to the thermoelectric cooler.Type: ApplicationFiled: April 12, 2017Publication date: August 3, 2017Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chung-Cheng CHOU, Po-Hao LEE, Jonathan Tehan CHEN
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Patent number: 9625186Abstract: A system and method of cooling a three dimensional integrated circuit (3D IC) using at least one thermoelectric cooler which is connected to the 3D IC by a plurality of conductive pillars. In some embodiments a controller controls power supply to the thermoelectric cooler, and a temperature monitor provides a temperature input to the controller. In some embodiments the controller maintains a temperature of a 3D IC within a predetermined range by cycling power to the thermoelectric cooler.Type: GrantFiled: August 29, 2013Date of Patent: April 18, 2017Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chung-Cheng Chou, Po-Hao Lee, Jonathan Tehan Chen
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Patent number: 9224464Abstract: A device includes a memory bit cell, a first current source, and a current comparator electrically connected to the memory bit cell and the first current source. A first transistor has a first terminal electrically connected to a first voltage supply node, a control terminal electrically connected to a controller, and a second terminal electrically connected to the memory bit cell and the current comparator. A sense amplifier is electrically connected to the current comparator and a reference current generator.Type: GrantFiled: February 10, 2014Date of Patent: December 29, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chung-Cheng Chou, Po-Hao Lee, Jonathan Tehan Chen
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Publication number: 20150228333Abstract: A device includes a memory bit cell, a first current source, and a current comparator electrically connected to the memory bit cell and the first current source. A first transistor has a first terminal electrically connected to a first voltage supply node, a control terminal electrically connected to a controller, and a second terminal electrically connected to the memory bit cell and the current comparator. A sense amplifier is electrically connected to the current comparator and a reference current generator.Type: ApplicationFiled: February 10, 2014Publication date: August 13, 2015Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chung-Cheng Chou, Po-Hao Lee, Jonathan Tehan Chen
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Publication number: 20150137059Abstract: The present disclosure provides resistive random access memory (RRAM) structures and methods of making the same. The RRAM structures include a bottom electrode having protruded step portion that allows formation of a self-aligned conductive path with a top electrode during operation. The protruded step portion may have an inclination angle of about 30 degrees to 150 degrees. Multiple RRAM structures may be formed by etching through a RRAM stack.Type: ApplicationFiled: November 15, 2013Publication date: May 21, 2015Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jonathan Tehan Chen, Chung-Cheng Chou, Po-Hao Lee, Kuo-Chi Tu
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Publication number: 20150059362Abstract: A system and method of cooling a three dimensional integrated circuit (3D IC) using at least one thermoelectric cooler which is connected to the 3D IC by a plurality of conductive pillars. In some embodiments a controller controls power supply to the thermoelectric cooler, and a temperature monitor provides a temperature input to the controller. In some embodiments the controller maintains a temperature of a 3D IC within a predetermined range by cycling power to the thermoelectric cooler.Type: ApplicationFiled: August 29, 2013Publication date: March 5, 2015Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chung-Cheng CHOU, Po-Hao LEE, Jonathan Tehan CHEN