Patents by Inventor Jonathan Vu

Jonathan Vu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190197591
    Abstract: The present disclosure provides generally for methods and systems relating to relocation estimates. According to the present disclosure, sales representatives and prospective customers may have access to the relocation estimate system to see how a quote is being generated and what the resource allocation was. These parties may make suggestions or ask questions about how a quote was generated. These parties may correct or update a quote based on needs not known during an initial walkthrough. Based on information input by a user, the relocation estimate system may provide a quote in real-time.
    Type: Application
    Filed: December 16, 2018
    Publication date: June 27, 2019
    Inventors: Mark Scullion, Len O'Neill, Jonathan Vu Tran, Caryn Knill, Timothy Meyer
  • Publication number: 20190197459
    Abstract: The present disclosure provides generally for methods and systems relating to relocation management. More specifically, the methods and systems relate to monitoring and assessing the progress and status of a relocation. In some aspects, a move plan may be developed to perform a relocation, wherein the move plan may organize the logistics of the project. In some embodiments, a move plan may comprise move segments that may allow for more detailed logistics management and monitoring. In some implementations, a progress formula may be generated for a relocation based at least in part on the move plan, which may allow for a dynamic and accurate understanding of the progress and status of a relocation.
    Type: Application
    Filed: December 17, 2018
    Publication date: June 27, 2019
    Inventors: Mark Scullion, Len O'Neill, Jonathan Vu Tran, Caryn Knill, Timothy Meyer
  • Patent number: 7318076
    Abstract: A comprehensive Memory-Resident Database Management System architecture and implementation is disclosed where a) all data storage in database is in memory, b) all database management functionality is in memory except backup and recovery storage based on hard disk, c) all database objects including tables, views, triggers, procedures, functions . . . are in memory, d) all data security is at memory level, e) all data indexed, sorted and searched based on the selected search algorithms are in memory, f) all logging functionality to refresh in-between transactions reside in memory. Therefore, the processing speed of database query will take advantage of speed of RAM (Random Access Memory) without sacrifice any speed losing on Hard disk I/O. Not only the whole database is running in RAM, but also all or pre-selected database table columns are default to be indexed. All internal processing of database query is based on indexed columns.
    Type: Grant
    Filed: January 22, 2003
    Date of Patent: January 8, 2008
    Assignee: Intelitrac, Inc.
    Inventors: Tianlong Chen, Jonathan Vu
  • Patent number: 7149855
    Abstract: A Distributed Memory Computing Environment (herein called “DMCE”) architecture and implementation is disclosed in which any computer equipped with a memory agent can borrow memory from other computer(s) equipped with a memory server on a distributed network. A memory backup and recovery as an optional subsystem of the Distributed Memory Computing system is also disclosed. A Network Attached Memory (herein called “NAM” or “NAM Box” or “NAM Server”) appliance is disclosed as a dedicated memory-sharing device attached to a network. A Memory Area Network (herein called “MAN”) is further disclosed, such a network is a network of memory device(s) or memory server(s) which provide memory sharing service to memory-demanding computer(s) or the like, when one memory device or memory server fails, its service will seamlessly transfer to other memory device(s) or memory server(s).
    Type: Grant
    Filed: January 23, 2004
    Date of Patent: December 12, 2006
    Assignee: Intelitrac, Inc.
    Inventors: Tianlong Chen, Jonathan Vu, Yingbin Wang
  • Patent number: 7051158
    Abstract: A computing environment for a device having a processor, a device memory and an operating system. A first process running in the operating system has a memory and a memory cache. A second process running in the operating system has a second process memory accessible to the first process. A communication channel between the first process and second process makes the second process memory available for the first process memory to use. The device memory is sectioned into memory blocks, each having a starting address. A block ID identifies the memory block. Data is stored in various memory units of the memory block. An offset ID identifies the memory unit. A DMCE Virtual address contains the offset ID, the block Id and a device ID for identifying the memory unit. The DMCE virtual address of a memory unit used for the memory function is copied into the memory cache.
    Type: Grant
    Filed: April 30, 2003
    Date of Patent: May 23, 2006
    Assignee: InteliTrac, Inc.
    Inventors: Tianlong Chen, Yingbin Wang, Yinong Wei, Jonathan Vu
  • Patent number: 7043623
    Abstract: A Distributed Memory Computing Environment (herein called “DMCE”) architecture and implementation is disclosed in which any computer equipped with a memory agent can borrow memory from other computer(s) equipped with a memory server on a distributed network. A memory backup and recovery as an optional subsystem of the Distributed Memory Computing system is also disclosed. A Network Attached Memory (herein called “NAM” or “NAM Box” or “NAM Server”) appliance is disclosed as a dedicated memory-sharing device attached to a network. A Memory Area Network (herein called “MAN”) is further disclosed, such a network is a network of memory device(s) or memory server(s) which provide memory sharing service to memory-demanding computer(s) or the like, when one memory device or memory server fails, its service will seamlessly transfer to other memory device(s) or memory server(s).
    Type: Grant
    Filed: January 22, 2003
    Date of Patent: May 9, 2006
    Assignee: InteliTrac, Inc.
    Inventors: Tianlong Chen, Jonathan Vu, Yingbin Wang
  • Publication number: 20050015396
    Abstract: A method and system for creating and searching a central linked list comprising a parent node which is situated at the center of a plurality of child nodes. Each child node has two double linked list pointers. One pointer points to the next child node, and the other pointer points to the parent node. Thus, matched data obtained at several child nodes moves immediately back to the parent simultaneously. The parent node contains the memory address and name of central linked list, a description of central linked list, and a description of the relationship between other parent nodes, as well as the relationship between each child node to its specific parent node. Each child node contains a node address, an attribute comprised of some or all of the stored data field and a link to the full data content that may reside on a file or in a database. Memory storage of the structure information is stored in system memory, such as, RAM.
    Type: Application
    Filed: July 16, 2004
    Publication date: January 20, 2005
    Inventor: Jonathan Vu
  • Publication number: 20040221122
    Abstract: A computing environment for a device having a processor, a device memory and an operating system. A first process running in the operating system has a memory and a memory cache. A second process running in the operating system has a second process memory accessible to the first process. A communication channel between the first process and second process makes the second process memory available for the first process memory to use. The device memory is sectioned into memory blocks, each having a starting address. A block ID identifies the memory block. Data is stored in various memory units of the memory block. An offset ID identifies the memory unit. A DMCE Virtual address contains the offset ID, the block Id and a device ID for identifying the memory unit. The DMCE virtual address of a memory unit used for the memory function is copied into the memory cache.
    Type: Application
    Filed: April 30, 2003
    Publication date: November 4, 2004
    Inventors: Tianlong Chen, Yingbin Wang, Yinong Wei, Jonathan Vu
  • Patent number: 6785674
    Abstract: A method and system for creating and searching a central linked list comprising a parent node which is situated at the center of a plurality of child nodes. Each child node has two double linked list pointers. One pointer points to the next child node, and the other pointer points to the parent node. Thus, matched data obtained at several child nodes moves immediately back to the parent simultaneously. The parent node contains the memory address and name of central linked list, a description of central linked list, and a description of the relationship between other parent nodes, as well as the relationship between each child node to its specific parent node. Each child node contains a node address, an attribute comprised of some or all of the stored data field and a link to the full data content that may reside on a file or in a database. Memory storage of the structure information is stored in system memory, such as, RAM.
    Type: Grant
    Filed: January 17, 2003
    Date of Patent: August 31, 2004
    Assignee: InteliTrac, Inc.
    Inventor: Jonathan Vu
  • Publication number: 20040151018
    Abstract: A Distributed Memory Computing Environment (herein called “DMCE”) architecture and implementation is disclosed in which any computer equipped with a memory agent can borrow memory from other computer(s) equipped with a memory server on a distributed network. A memory backup and recovery as an optional subsystem of the Distributed Memory Computing system is also disclosed. A Network Attached Memory (herein called “NAM” or “NAM Box” or “NAM Server”) appliance is disclosed as a dedicated memory-sharing device attached to a network. A Memory Area Network (herein called “MAN”) is further disclosed, such a network is a network of memory device(s) or memory server(s) which provide memory sharing service to memory-demanding computer(s) or the like, when one memory device or memory server fails, its service will seamlessly transfer to other memory device(s) or memory server(s).
    Type: Application
    Filed: January 23, 2004
    Publication date: August 5, 2004
    Inventors: Tianlong Chen, Jonathan Vu, Yingbin Wang
  • Publication number: 20040143582
    Abstract: A method and system for creating and searching a central linked list comprising a parent node which is situated at the center of a plurality of child nodes. Each child node has two double linked list pointers. One pointer points to the next child node, and the other pointer points to the parent node. Thus, matched data obtained at several child nodes moves immediately back to the parent simultaneously. The parent node contains the memory address and name of central linked list, a description of central linked list, and a description of the relationship between other parent nodes, as well as the relationship between each child node to its specific parent node. Each child node contains a node address, an attribute comprised of some or all of the stored data field and a link to the full data content that may reside on a file or in a database. Memory storage of the structure information is stored in system memory, such as, RAM.
    Type: Application
    Filed: January 17, 2003
    Publication date: July 22, 2004
    Inventor: Jonathan Vu
  • Publication number: 20040143562
    Abstract: A comprehensive Memory-Resident Database Management System architecture and implementation is disclosed where a) all data storage in database is in memory, b) all database management functionality is in memory except backup and recovery storage based on hard disk, c) all database objects including tables, views, triggers, procedures, functions . . . are in memory, d) all data security is at memory level, e) all data indexed, sorted and searched based on the selected search algorithms are in memory, f) all logging functionality to refresh in-between transactions reside in memory. Therefore, the processing speed of database query will take advantage of speed of RAM (Random Access Memory) without sacrifice any speed losing on Hard disk I/O. Not only the whole database is running in RAM, but also all or pre-selected database table columns are default to be indexed. All internal processing of database query is based on indexed columns.
    Type: Application
    Filed: January 22, 2003
    Publication date: July 22, 2004
    Inventors: Tianlong Chen, Jonathan Vu
  • Publication number: 20040143718
    Abstract: A Distributed Memory Computing Environment (herein called “DMCE”) architecture and implementation is disclosed in which any computer equipped with a memory agent can borrow memory from other computer(s) equipped with a memory server on a distributed network. A memory backup and recovery as an optional subsystem of the Distributed Memory Computing system is also disclosed. A Network Attached Memory (herein called “NAM” or “NAM Box” or “NAM Server”) appliance is disclosed as a dedicated memory-sharing device attached to a network. A Memory Area Network (herein called “MAN”) is further disclosed, such a network is a network of memory device(s) or memory server(s) which provide memory sharing service to memory-demanding computer(s) or the like, when one memory device or memory server fails, its service will seamlessly transfer to other memory device(s) or memory server(s).
    Type: Application
    Filed: January 22, 2003
    Publication date: July 22, 2004
    Inventors: Tianlong Chen, Jonathan Vu, Yingbin Wang