Patents by Inventor Jonathan W. Haines
Jonathan W. Haines has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10452281Abstract: An example method includes providing at least two data storage areas in a memory, providing a first amount of over-provisioning for a first of the at least two data storage areas and a second amount of over-provisioning for a second of the at least two data storage areas, categorizing data based on a characteristic of the data, and storing the data in one of the at least two data storage areas based on the categorization.Type: GrantFiled: November 9, 2015Date of Patent: October 22, 2019Assignee: SEAGATE TECHNOLOGY LLCInventors: Jonathan W Haines, Timothy R Feldman, Wayne H Vinson, Ryan J Goss, Kevin Gomez, Mark Allen Gaertner
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Patent number: 9817755Abstract: The disclosure is related to systems and methods of managing a memory. In a particular embodiment, a memory channel is disclosed that includes multiple memory units, with each memory unit comprising multiple garbage collection units. The memory channel also includes a controller that is communicatively coupled to the multiple memory units. The controller selects a memory unit of the multiple memory units for garbage collection based on a calculated number of memory units, of the multiple memory units, to garbage collect.Type: GrantFiled: September 11, 2014Date of Patent: November 14, 2017Assignee: Seagate Technology LLCInventors: Timothy R. Feldman, Jonathan W. Haines, Wayne H. Vinson
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Patent number: 9471221Abstract: Implementations described and claimed herein provide a method and system for managing execution of commands for a storage device, the method comprising determining a plurality of commands to be executed for the storage device and while a storage device is executing at least one command, determining an execution order for at least two of the plurality of commands. Alternate implementation described and claimed herein provide a computer readable memory for storing a data structure, the data structure comprising a cost table comprising a number of cells, each cell containing one or more cost values related to one of a plurality of traversals between two locations on a storage device wherein each of the plurality of traversals is related to completion of one of a plurality of commands and a benefit array comprising a number of cells, each cell containing a benefit value related to completion of one of the plurality of commands.Type: GrantFiled: April 6, 2011Date of Patent: October 18, 2016Assignee: SEAGATE TECHNOLOGY LLCInventors: Jonathan W. Haines, Timothy R. Feldman
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Publication number: 20160188226Abstract: An example method includes providing at least two data storage areas in a memory, providing a first amount of over-provisioning for a first of the at least two data storage areas and a second amount of over-provisioning for a second of the at least two data storage areas, categorizing data based on a characteristic of the data, and storing the data in one of the at least two data storage areas based on the categorization.Type: ApplicationFiled: November 9, 2015Publication date: June 30, 2016Applicant: SEAGATE TECHNOLOGY LLCInventors: Jonathan W. Haines, Timothy R. Feldman, Wayne H. Vinson, Ryan J. Goss, Kevin Gomez, Mark Allen Gaertner
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Patent number: 9183134Abstract: An example method includes providing at least two data storage areas in a memory, providing a first amount of over-provisioning for a first of the at least two data storage areas and a second amount of over-provisioning for a second of the at least two data storage areas, categorizing data based on a characteristic of the data, and storing the data in one of the at least two data storage areas based on the categorization.Type: GrantFiled: April 22, 2010Date of Patent: November 10, 2015Assignee: SEAGATE TECHNOLOGY LLCInventors: Jonathan W. Haines, Timothy R. Feldman, Wayne H. Vinson, Ryan J. Goss, Kevin Gomez, Mark Allen Gaertner
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Patent number: 9075733Abstract: This disclosure is related to systems and methods for selective metadata storage in a system having multiple memories. In one example, a device may include a control circuit configured to selectively store a metadata base map in a first memory or a second memory. The metadata base map may include information to determine a physical memory address from a logical block address. The control circuit may also be configured to store metadata updates separately from the metadata base map. The metadata updates may comprise changes to the metadata base map. The control circuit may also be configured to selectively store the metadata updates in the first memory or the second memory based on characteristics of the device.Type: GrantFiled: August 25, 2011Date of Patent: July 7, 2015Assignee: Seagate Technology LLCInventors: Timothy R. Feldman, Wayne H. Vinson, Brett A. Cook, Jonathan W. Haines
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Publication number: 20140379973Abstract: The disclosure is related to systems and methods of managing a memory. In a particular embodiment, a memory channel is disclosed that includes multiple memory units, with each memory unit comprising multiple garbage collection units. The memory channel also includes a controller that is communicatively coupled to the multiple memory units. The controller selects a memory unit of the multiple memory units for garbage collection based on a calculated number of memory units, of the multiple memory units, to garbage collect.Type: ApplicationFiled: September 11, 2014Publication date: December 25, 2014Inventors: Timothy R. Feldman, Jonathan W. Haines, Wayne H. Vinson
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Patent number: 8909888Abstract: Method and apparatus for securely erasing data from a non-volatile memory, such as but not limited to a flash memory array. In accordance with various embodiments, an extended data set to be sanitized from the memory is identified. The extended data set includes multiple copies of data having a common logical address and different physical addresses within the memory. The extended data set is sanitized in relation to a characterization of the data set. The data sanitizing operation results in the extended data set being purged from the memory and other previously stored data in the memory being retained.Type: GrantFiled: April 29, 2011Date of Patent: December 9, 2014Assignee: Seagate Technology LLCInventors: Ryan James Goss, David Scott Seekins, Jonathan W. Haines, Timothy R. Feldman
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Patent number: 8874872Abstract: The disclosure is related to systems and methods of managing a memory. In a particular embodiment, a memory channel is disclosed that includes multiple memory units, with each memory unit comprising multiple garbage collection units. The memory channel also includes a controller that is communicatively coupled to the multiple memory units. The controller selects a memory unit of the multiple memory units for garbage collection based on a calculated number of memory units, of the multiple memory units, to garbage collect.Type: GrantFiled: January 21, 2011Date of Patent: October 28, 2014Assignee: Seagate Technology LLCInventors: Timothy R. Feldman, Jonathan W. Haines, Wayne H. Vinson
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Patent number: 8745353Abstract: The present disclosure describes various techniques resolving block boundary issues and reconstructing logical blocks in a block access storage device when there are resulting mismatches between logical and physical block sizes or alignments, such that logical blocks span multiple physical block boundaries in irregular ways. In one example, a method comprises the following features: receiving logical block addresses that are associated with a sequence of logical blocks; and locating a first portion of a logical block within a first physical block that is stored in a block access storage device based upon a logical block address of the logical block, wherein the logical block is part of the sequence of logical blocks, and wherein at least two logical blocks within the sequence of logical blocks have different sizes.Type: GrantFiled: October 23, 2009Date of Patent: June 3, 2014Assignee: Seagate Technology LLCInventors: Timothy R. Feldman, Wayne H. Vinson, Jonathan W. Haines
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Patent number: 8364929Abstract: A storage device, e.g., an SSD, is configured to enable spanning for a logical block between pages of the device. In one example, a device includes a data storage module to receive data to be stored, wherein the data comprises a plurality of logical blocks, and wherein a size of the plurality of logical blocks exceeds a size of a first page of the device, and a spanning determination module to determine whether to partition one of the plurality of logical blocks into a first partition and a second partition, wherein the data storage module is configured to partition the one of the plurality of logical blocks into the first partition and the second partition and to store the first partition in the first page and the second partition in a second, different page when the spanning determination module determines to partition the one of the plurality of logical blocks.Type: GrantFiled: October 23, 2009Date of Patent: January 29, 2013Assignee: Seagate Technology LLCInventors: Jonathan W. Haines, Wayne H. Vinson, Timothy R. Feldman
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Publication number: 20120278564Abstract: Method and apparatus for securely erasing data from a non-volatile memory, such as but not limited to a flash memory array. In accordance with various embodiments, an extended data set to be sanitized from the memory is identified. The extended data set includes multiple copies of data having a common logical address and different physical addresses within the memory. The extended data set is sanitized in relation to a characterization of the data set. The data sanitizing operation results in the extended data set being purged from the memory and other previously stored data in the memory being retained.Type: ApplicationFiled: April 29, 2011Publication date: November 1, 2012Applicant: SEAGATE TECHNOLOGY LLCInventors: Ryan James Goss, David Scott Seekins, Jonathan W. Haines, Timothy R. Feldman
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Patent number: 8301830Abstract: A method for managing wear levels in a storage device having a plurality of data blocks, the method comprising moving data to data blocks having higher erasure counts based on a constraint on static wear levelness that tightens over at least a portion of the lives of the plurality of data blocks.Type: GrantFiled: October 12, 2011Date of Patent: October 30, 2012Assignee: Seagate Technology LLCInventors: Timothy R. Feldman, Jonathan W. Haines
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Publication number: 20120260047Abstract: Implementations described and claimed herein provide a method and system for managing execution of commands for a storage device, the method comprising determining a plurality of commands to be executed for the storage device and while a storage device is executing at least one command, determining an execution order for at least two of the plurality of commands. Alternate implementation described and claimed herein provide a computer readable memory for storing a data structure, the data structure comprising a cost table comprising a number of cells, each cell containing one or more cost values related to one of a plurality of traversals between two locations on a storage device wherein each of the plurality of traversals is related to completion of one of a plurality of commands and a benefit array comprising a number of cells, each cell containing a benefit value related to completion of one of the plurality of commands.Type: ApplicationFiled: April 6, 2011Publication date: October 11, 2012Applicant: SEAGATE TECHNOLOGY LLCInventors: Jonathan W. Haines, Timothy R. Feldman, Wayne H. Vinson
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Publication number: 20120191937Abstract: The disclosure is related to systems and methods of managing a memory. In a particular embodiment, a memory channel is disclosed that includes multiple memory units, with each memory unit comprising multiple garbage collection units. The memory channel also includes a controller that is communicatively coupled to the multiple memory units. The controller selects a memory unit of the multiple memory units for garbage collection based on a calculated number of memory units, of the multiple memory units, to garbage collect.Type: ApplicationFiled: January 21, 2011Publication date: July 26, 2012Applicant: SEAGATE TECHNOLOGY LLCInventors: Timothy R. Feldman, Jonathan W. Haines, Wayne H. Vinson
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Patent number: 8200869Abstract: A method and apparatus associated with circuitry configured to perform a selected one of a plurality of different data integrity operations on stored data in relation to a manner in which the data are to be retrieved. In some embodiments a data storage device is partitioned into a plurality of partitions, and one of a plurality of different data integrity operations is performed on stored data in relation to which partition of the plurality of partitions the stored data is in.Type: GrantFiled: February 7, 2006Date of Patent: June 12, 2012Assignee: Seagate Technology LLCInventors: Jonathan W. Haines, EweChye Tan
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Patent number: 8134791Abstract: A method of identifying a string or chain of efficient or “good enough” disc operations for processing (a pseudo optimal chain) is provided. A “pseudo optimal chain” comprises a string or chain of operations that, while not necessarily the optimal string or chain, provides an efficient sequence of operations that can be determined by comparing individual operations to predetermined selection criteria. In contrast to a true optimization technique that can require computing up to N! combinations for N operations, the string or chain of efficient or “good enough” disc operations allows for relatively simpler computations.Type: GrantFiled: February 4, 2010Date of Patent: March 13, 2012Assignee: Seagate Technology LLCInventors: Jonathan W. Haines, Timothy R. Feldman
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Publication number: 20110283048Abstract: This disclosure is related to systems and methods for a structured mapping system for a memory device, such as a solid state data storage device. In one example, a data storage device may include a multi-level address mapping system. The multi-level address mapping system may be implemented completely independent of a host computer and a host computer operating system. Also, the multi-level mapping system may be stored to allow each level, or subsets of each level, to be re-written independently of the other levels or the other subsets.Type: ApplicationFiled: May 11, 2010Publication date: November 17, 2011Applicant: SEAGATE TECHNOLOGY LLCInventors: Timothy R. Feldman, Brett A. Cook, Jonathan W. Haines, Wayne H. Vinson
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Patent number: 8055942Abstract: Methods and systems are disclosed to generate a data map for a data storage device. A data map may be generated by scanning, during a power-on initialization process, data units of data stored on a data storage medium of a data storage device. The scanning may start from a selected data unit and proceed through the data units in an order opposite to a write order to identify a first data unit that is not fully erased. Also. an error recovery status of the first data unit may be determined based on an error correction code. A likely erased status of the first data unit may be assigned when the determined error recovery status is unrecoverable.Type: GrantFiled: December 3, 2009Date of Patent: November 8, 2011Assignee: Seagate Technology LLCInventors: Jonathan W. Haines, Brett A. Cook, Gabriel Ibarra, Peter Vasiliev
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Patent number: 8051241Abstract: A method for managing wear levels in a storage device having a plurality of data blocks, the method comprising moving data to data blocks having higher erasure counts based on a constraint on static wear levelness that tightens over at least a portion of the lives of the plurality of data blocks.Type: GrantFiled: May 7, 2009Date of Patent: November 1, 2011Assignee: Seagate Technology LLCInventors: Timothy R. Feldman, Jonathan W. Haines