Patents by Inventor Jonathan W. Oh

Jonathan W. Oh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260112878
    Abstract: An apparatus may include a fuse coupled between a bidirectional electrostatic discharge (ESD) element and a first bond contact, the fuse is configured to receive an ESD discharge current generated between the first bond contact and a second bond contact, and the fuse is configured to blow in response to the ESD discharge current exceeding a threshold current magnitude, and a detector coupled to the bidirectional ESD element, the detector is configured to determine a state of the fuse.
    Type: Application
    Filed: October 20, 2025
    Publication date: April 23, 2026
    Inventors: James E. Davis, Kenneth W. Marr, Souvick Mitra, Tyler Klarr, Jonathan W. Oh, Naohisa Nishioka, Yu Wu Su, Manu Sushruth
  • Patent number: 11817145
    Abstract: Methods, systems, and devices for programming multi-level memory cells are described. After a first pass, an offset in the form of one or more offset pulses, may be applied to MLCs that are in a state of a higher level. The offset may be applied before or during a first part of a second pass. The offset may move the signals of the cells before the cells are finally programmed so as to avoid potential overlaps between the unprogrammed cells and cells that are programmed to the lower half of the final levels during the second pass. The offset cells may then be further moved to the other levels in the higher half of the final levels.
    Type: Grant
    Filed: March 10, 2022
    Date of Patent: November 14, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Giuseppe Cariello, Jonathan W. Oh, Fulvio Rori
  • Publication number: 20220270677
    Abstract: Methods, systems, and devices for programming multi-level memory cells are described. After a first pass, an offset in the form of one or more offset pulses, may be applied to MLCs that are in a state of a higher level. The offset may be applied before or during a first part of a second pass. The offset may move the signals of the cells before the cells are finally programmed so as to avoid potential overlaps between the unprogrammed cells and cells that are programmed to the lower half of the final levels during the second pass. The offset cells may then be further moved to the other levels in the higher half of the final levels.
    Type: Application
    Filed: March 10, 2022
    Publication date: August 25, 2022
    Inventors: Giuseppe Cariello, Jonathan W. Oh, Fulvio Rori
  • Patent number: 11276461
    Abstract: Methods, systems, and devices for programming multi-level memory cells are described. After a first pass, an offset in the form of one or more offset pulses, may be applied to MLCs that are in a state of a higher level. The offset may be applied before or during a first part of a second pass. The offset may move the signals of the cells before the cells are finally programmed so as to avoid potential overlaps between the unprogrammed cells and cells that are programmed to the lower half of the final levels during the second pass. The offset cells may then be further moved to the other levels in the higher half of the final levels.
    Type: Grant
    Filed: December 1, 2020
    Date of Patent: March 15, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Giuseppe Cariello, Jonathan W. Oh, Fulvio Rori
  • Publication number: 20210342100
    Abstract: Devices and techniques for NAND temperature-aware operations are disclosed herein. A device controller can receive a command to write data to a component in the device. A temperature corresponding to the component can be obtained in response to receiving the command. The command can be executed by the controller to write data to the component. Executing the command can include writing the temperature into a management portion of the device that is separate from a user portion of the device to which the data is written.
    Type: Application
    Filed: July 12, 2021
    Publication date: November 4, 2021
    Inventors: Chiara Cerafogli, Fulvio Rori, Jonathan W. Oh, Giuseppe Cariello
  • Publication number: 20200004458
    Abstract: Devices and techniques for NAND temperature-aware operations are disclosed herein. A device controller can receive a command to write data to a component in the device. A temperature corresponding to the component can be obtained in response to receiving the command. The command can be executed by the controller to write data to the component. Executing the command can include writing the temperature into a management portion of the device that is separate from a user portion of the device to which the data is written.
    Type: Application
    Filed: June 29, 2018
    Publication date: January 2, 2020
    Inventors: Chiara Cerafogli, Fulvio Rori, Jonathan W. Oh, Giuseppe Cariello