Abstract: An ultra wide band (UWB) communication system includes a channel filter bank to cover the 3.1 to 10.6 GHz band in channels having approximately equal bandwidth. A transmitter and a receiver may share the filter bank when the communication system is configured as a transceiver. The transmitter produces short duration, wide bandwidth RF pulses by triggering the impulse response of one or more of the filters of the filter bank. The impulse response is triggered by applying a very short duration time domain signal produced using a single pulse mixer and a step recovery diode circuit. The receiver uses a square-law detector to detect RF signals passed by the channel filter bank and the detected signals are further processed to extract a data signal and a confidence level in the data signal.

Abstract: An integrated circuit having a transmit chain configured to provide direct FM modulation of a voltage controlled oscillator of a frequency synthesizer by a composite signal that includes audio and video components, and a receive chain configured to provide a television compatible modulated signal having audio and video information. The receive chain can display locally transmitted signals.

Abstract: An apparatus and methods for concealing missing packets in a CVSD bit stream are disclosed. In one embodiment, an indication from a packet loss indicator (PLI) that a packet is missing is received. Next the status of the missing packet is determined. Based on the status of the missing packet, a sample packet is generated to replace the missing packet, and a memory of the CVSD is updated. A compressed copy of the sample packet may be stored in a first memory buffer in either ?-law or a-law format.

Abstract: An in-chip monitoring method and apparatus are disclosed. In one embodiment the apparatus includes a test pad, a transmission gate and a plurality of test components coupled to the transmission gate. The transmission gate is attached to a substrate and adapted to receive a code word uniquely addressed to one of the plurality of test components. In a further embodiment, the transmission gate is further adapted to relay an output of the one of the plurality of test components to the test pad, in response to receipt of the code word.

Abstract: A wireless receiver e.g., a Bluetooth-compatible receiver or a receive chain in a Bluetooth-compatible transceiver, includes a discriminator unit and a timing recovery unit. The output of the discriminator unit is provided as an input to the timing recovery unit, which timing recovery unit is configured to align a free-running clock of the receiver with a received signal to extract received data therefrom.

Abstract: A dual gain amplification low noise amplifier that includes an amplification circuit to a provide dual gain amplification—high gain amplification for a weak data signal and low gain amplification for a strong data signal. Also included is a control circuit to maintain approximately the same P1dB point for the weak signal during high gain amplification as for the strong signal during low gain amplification.

Abstract: A method and apparatus for tuning a VCO circuit to provide desired modulations is described. In one embodiment, the method of the present invention uses a controlled voltage from a digital-to-analog converter to obtain VCO voltage/frequency characteristics. The VCO voltage/frequency characteristics are used to determine a VCO capacitance value as well as a charge pump current level for each frequency band of interest. For one embodiment, the VCO circuit includes a bank of switchable capacitors used to set the VCO capacitance value. The charge pump includes a number of switch-controlled current meters to set the charge pump current level. The VCO capacitors and charge pump current meters are controlled by an off-chip CPU.

Abstract: A high-speed phase-frequency detection module is described to function at very high frequencies and to produce very low jitter. In one embodiment, high-speed phase-frequency detection module includes a PFD with edge-triggered asynchronous-reset true-single-phase-clocking (“TSPC”) D flip-flops that have very short CLK to Q and Reset to Q time delays. In one embodiment, the high-speed phase-frequency detection module includes a charge pump, without replica or feedback, that can respond to the very narrow pulses from the PFD and produce output voltages with small ripple, thus leading to low VCO output jitter.

Abstract: Tuning of a filter circuit is accomplished by determining a real RC time constant value for the filter circuit, then comparing the real RC vale to a predetermined RC value. If the real RC value does not match the predetermined RC value, the real RC value is varied (e.g.

Abstract: An antenna assembly and methods of use are disclosed. In one embodiment, the antenna assembly is formed on a substrate and includes a first metal region and a second metal region attached to a surface of the substrate. The second metal region may be separated from the first metal region by a gap. The second metal region may include a first pronged end and a second end that correspond, respectively, to a first pronged end and a second end of the first metal region. The pronged ends of each metal region are connected to the differential inputs and outputs of a transceiver coupled with the antenna assembly.

Abstract: A dual gain amplification low noise amplifier that includes an amplification circuit to a provide dual gain amplification—high gain amplification for a weak data signal and low gain amplification for a strong data signal. Also included is a control circuit to maintain approximately the same P1dB point for the weak signal during high gain amplification as for the strong signal during low gain amplification.

Abstract: An in-chip monitoring method and apparatus are disclosed. In one embodiment the apparatus includes a test pad, a transmission gate and a plurality of test components coupled to the transmission gate. The transmission gate is attached to a substrate and adapted to receive a code word uniquely addressed to one of the plurality of test components. In a further embodiment, the transmission gate is further adapted to relay an output of the one of the plurality of test components to the test pad, in response to receipt of the code word.

Abstract: An antenna assembly and methods of use are disclosed. In one embodiment, the antenna assembly is formed on a substrate and includes a first metal region and a second metal region attached to a surface of the substrate. The second metal region may be separated from the first metal region by a gap. The second metal region may include a first pronged end and a second end that correspond, respectively, to a first pronged end and a second end of the first metal region. The pronged ends of each metal region are connected to the differential inputs and outputs of a transceiver coupled with the antenna assembly.

Abstract: A Ku band frequency signal transmitter using a minimum of Ku band signal processing components is shown. Inexpensive generation of Ku band signals is provided by frequency multiplying high power, lower frequency signals to a final Ku band signal frequency. The transmitter generates an intermediate frequency signal from a baseband modulated signal and a high frequency local oscillator signal. The baseband signal is FSK modulated and has a constant envelope. A dividing stage reduces the baseband frequency signal to improve the spectral purity of the final Ku band output signal.