Patents by Inventor Jong An

Jong An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7545328
    Abstract: Provided are an antenna using an inductively coupled feeding method, a Radio Frequency Identification (RFID) tag thereof, and an antenna impedance matching method thereof. The antenna includes a resonator for determining a resonance frequency of the antenna and a feeder for providing an RF signal to an element connected to the antenna. An RFID tag includes an antenna which receives an RF signal from the RFID reader, an RF front-end which rectifies and detects the RF signal, and a signal processor which is connected to the RF front-end. Particularly, the antenna includes a resonator for determining a resonance frequency of an antenna and a feeder for providing the RF signal to the RF front-end, wherein mutual inductive coupling between the resonator and the feeder is performed.
    Type: Grant
    Filed: December 7, 2005
    Date of Patent: June 9, 2009
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Hae-Won Son, Won-Kyu Choi, Je-Hoon Yun, Cheol-Sig Pyo, Jong-Suk Chae
  • Patent number: 7546157
    Abstract: A surface electrocardiogram (EKG) is emulated using signals detected by the internal leads of an implanted device. In one example, the emulation is performed using a technique that concatenates portions of signals sensed using different electrodes, such as by combining far-field ventricular signals sensed in the atria with far-field atrial signals sensed in the ventricles or by combining near-field signals sensed in the atria with near-field signals sensed in the ventricles. In another example, the emulation is performed using a technique that selectively amplifies or attenuates portions of a single signal sensed using a single pair of electrodes, such as by attenuating near-field portions of an atrial unipolar signal relative to far-field portions of the same signal or by attenuating atrial portions of a cross-chamber signal relative to ventricular portions to the same signal.
    Type: Grant
    Filed: December 12, 2003
    Date of Patent: June 9, 2009
    Assignee: Pacesetter, Inc.
    Inventors: Jong Kil, Gene A. Bornzin, Peter Boileau, Euljoon Park
  • Patent number: 7545301
    Abstract: A delta-sigma modulator having a first integrator for integrating an input signal; an analog-to-digital converter for converting the integrated signal into a digital signal; a delay circuit for delaying an output signal of the analog-to-digital converter; and a differential delay circuit for differentially delaying the output signal of the analog-to-digital converter. More particularly, the delta-sigma modulator has low distortion characteristics suitable for multi-bit fast operation, wherein a feedback signal is delayed by one clock period through the delay circuit and the differential delay circuit.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: June 9, 2009
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yi Gyeong Kim, Kwi Dong Kim, Chong Ki Kwon, Jong Dae Kim
  • Patent number: 7545775
    Abstract: A method for performing a handoff in an ALL-IP network. The Mobile Station (MS) transmits measurement information to a new Base Transceiver System (BTS) and the Radio Network Controller (RNC) to start a handoff, the RNC requests the new BTS to set up a radio link with the MS. When the radio link is set up between the MS and the new BTS, the RNC requests to delete header information of the MS stored in an old BTS. The MS transmits a message including traffic header information to the new BTS, the new BTS transmits a binding update message to the MS. Then the MS transmits only the voice frame excluding the traffic header information to the new BTS.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: June 9, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Oh Kim, Jae-Am Choi
  • Patent number: 7544991
    Abstract: A non-volatile memory device and methods of manufacturing and operating the same are provided. In a method of manufacturing a non-volatile memory device, a substrate having a stepped portion that may include a first horizontal face, a second horizontal face lower than the first horizontal face, and a vertical face connected between the first and second horizontal faces may be prepared. A first impurity region may be formed under the first horizontal face. A tunnel insulation layer may be continuously formed on the vertical face and the second horizontal face. A floating gate electrode having a tip higher than the first horizontal face may be formed on the tunnel insulation layer. A dielectric layer may be formed on the floating gate electrode. The floating gate electrode may be covered with a control gate electrode. A second impurity region horizontally spaced apart from the floating gate electrode may be formed under the second horizontal face.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: June 9, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Woo Kim, Jong-Hyon Ahn, Don-Woo Lee
  • Patent number: 7546067
    Abstract: A two-component developing unit having an OPC, a toner supply part supplying toner, and a carrier circulating part including a carrier and circulating the carrier to mix the toner with the carrier and deliver the toner onto the OPC, includes a housing with a hollow body connecting the toner supply part and the carrier circulating part, a rotating shaft inside the housing extending from the toner supply part to the carrier circulating part; a right delivering wing discontinuously formed on the rotating shaft with gaps and which delivers the toner and the carrier from the toner supply part to the carrier circulating part; and a reverse delivering wing in the gaps of the right delivering wing which delivers the toner and the carrier in a reverse direction of the right delivering wing.
    Type: Grant
    Filed: April 4, 2006
    Date of Patent: June 9, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jong-hyun Park
  • Patent number: 7545687
    Abstract: A semiconductor memory device checks a RAS timing to recognize and set an operation timing of the semiconductor memory device. The semiconductor memory device includes an input buffer, a RAS timing controller and a bank controller. The input buffer transmits a RAS timing test signal. The RAS timing controller generates a RAS timing signal. The bank controller controls a refresh operation timing in response to an output of the input buffer in a test mode and the RAS timing signal in a normal mode.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: June 9, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jong-Won Lee, Sung-Kwon Cho
  • Patent number: 7545246
    Abstract: A piezoelectric Micro Electro Mechanical System (MEMS) switch includes a substrate, first and second fixed signal lines symmetrically formed in a spaced-apart relation to each other on the substrate to have a predetermined gap therebetween, a piezoelectric actuator disposed in alignment with the first and the second fixed signal lines in the predetermined gap, and having a first end supported on the substrate to allow the piezoelectric actuator to be movable up and down, and a movable signal line having a first end connected to one of the first and the second fixed signal lines, and a second end configured to be in contact with, or separate from the other of the first and second fixed signal lines, the movable signal line at least one side thereof being connected to an upper surface of the piezoelectric actuator.
    Type: Grant
    Filed: September 6, 2006
    Date of Patent: June 9, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-seok Kim, In-sang Song, Sang-hun Lee, Sang-wook Kwon, Chang-seung Lee, Young-tack Hong, Che-heung Kim
  • Patent number: 7545332
    Abstract: The present invention relates to a portable terminal including a terminal body and a retractable antenna operatively connected to the terminal body and capable of being retractably housed into and withdrawn out of the terminal body. The retractable antenna includes a base rotatably supported at the terminal body, an antenna rod connected with the base and including at least one telescoping member of extending a length of the antenna rod, and a pivot connection unit connecting the base to the antenna rod and allowing the antenna rod to pivot with respect to the base.
    Type: Grant
    Filed: April 19, 2007
    Date of Patent: June 9, 2009
    Assignee: LG Electronics Inc.
    Inventors: Mun-Gyu Kim, Jong-Hyun Park
  • Patent number: 7545626
    Abstract: A multi-layer ceramic capacitor including: a ceramic sintered body having cover layers provided on upper and lower surfaces thereof as outermost layers and a plurality of ceramic layers disposed between the cover layers; first and second internal electrodes formed on the ceramic layers, the first and second internal electrodes stacked to interpose one of the ceramic layers; first and second external electrodes formed on opposing sides of the ceramic sintered body to connect to the first and second internal electrodes, respectively; and anti-oxidant electrode layers formed between the cover layers and adjacent ones of the ceramic layers, respectively, the anti-oxidant electrode layers arranged not to affect capacitance.
    Type: Grant
    Filed: March 12, 2008
    Date of Patent: June 9, 2009
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Dae Hwan Kim, Tae Ho Song, Hyung Joon Kim, Jong Ho Lee, Chul Seung Lee
  • Patent number: 7544071
    Abstract: In one embodiment, an improved electrical power distribution apparatus is disclosed which includes a conduit containing at least one elongate conductor (4126, 4128). The conduit has an opening (4154) through which a connector is able to be inserted to connect electrically with the conductor (4126, 4128). The improvement relates to the use of a plurality of conductive members (5100) disposed between the opening (4154) and the conductor (4126, 4128), and a plurality of resilient support members (5200) such that each conductive member (5100) is separately supported by a respective support member (5200) and displaceable by a connector to provide access to the conductor. An improved power supply connector for use with the power distribution apparatus is also disclosed.
    Type: Grant
    Filed: January 21, 2004
    Date of Patent: June 9, 2009
    Assignee: Nutek Private Limited
    Inventor: Choon Jong
  • Patent number: 7545000
    Abstract: Provided are a Schottky barrier tunnel transistor and a method of manufacturing the same that are capable of minimizing leakage current caused by damage to a gate sidewall of the Schottky barrier tunnel transistor using a Schottky tunnel barrier naturally formed at a semiconductor-metal junction as a tunnel barrier. The method includes the steps of: forming a semiconductor channel layer on an insulating substrate; forming a dummy gate on the semiconductor channel layer; forming a source and a drain at both sides of the dummy gate on the insulating substrate; removing the dummy gate; forming an insulating layer on a sidewall from which the dummy gate is removed; and forming an actual gate in a space from which the dummy gate is removed. In manufacturing the Schottky barrier tunnel transistor using the dummy gate, it is possible to form a high-k dielectric gate insulating layer and a metal gate, and stable characteristics in silicidation of the metal layer having very strong reactivity can be obtained.
    Type: Grant
    Filed: July 13, 2006
    Date of Patent: June 9, 2009
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yark Yeon Kim, Seong Jae Lee, Moon Gyu Jang, Chel Jong Choi, Myung Sim Jun, Byoung Chul Park
  • Patent number: 7545037
    Abstract: Provided are embodiments of semiconductor chips having a redistributed metal interconnection directly connected to power/ground lines of an internal circuit are provided. Embodiments of the semiconductor chips include an internal circuit formed on a semiconductor substrate. A chip pad is disposed on the semiconductor substrate. The chip pad is electrically connected to the internal circuit through an internal interconnection. A passivation layer is provided over the chip pad. A redistributed metal interconnection is provided on the passivation layer. The redistributed metal interconnection directly connects the internal interconnection to the chip pad through a via-hole and a chip pad opening, which penetrate at least the passivation layer. Methods of fabricating the semiconductor chip are also provided.
    Type: Grant
    Filed: March 17, 2006
    Date of Patent: June 9, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jong-Joo Lee
  • Patent number: 7545081
    Abstract: A piezoelectric RF micro electro mechanical system (MEMS) device and a method of fabricating the same are provided, in which the RF MEMS device is driven upward at a low voltage based on a piezoelectric effect. The piezoelectric RF MEMS device includes an upper substrate provided with an RF output signal line, a piezoelectric actuator positioned below the RF output signal line, and a lower substrate provided with a cavity so that one end of the piezoelectric actuator is fixed to the lower substrate and its other end is movably spaced apart from the upper and lower substrates, wherein the piezoelectric actuator is provided with an RF input signal line thereon, and a contact pad is provided to connect the RF output signal line with the RF input signal line when the piezoelectric actuator is driven upward.
    Type: Grant
    Filed: November 9, 2006
    Date of Patent: June 9, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-seok Kim, In-sang Song, Sang-hun Lee, Sang-wook Kwon, Chang-seung Lee, Young-tack Houng, Che-heung Kim
  • Patent number: 7545701
    Abstract: A circuit and method of driving a sub-word line of a semiconductor memory device capable of reducing power consumption is disclosed. The sub-word line driving circuit includes a first transistor, a second transistor and a third transistor. The first transistor pre-charges a boost node to a first voltage in response to a main word line driving signal. The second transistor boosts the boost node to a second voltage in response to a sub-word line driving signal, and provides the sub-word line driving signal to a sub-word line. The third transistor provides the main word line driving signal to the sub-word line in response to a third voltage that has a lower level than a logic “high” state of the sub-word line driving signal.
    Type: Grant
    Filed: December 6, 2006
    Date of Patent: June 9, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Sun Min, Jong-Hyun Choi
  • Patent number: 7545161
    Abstract: An on-chip circuit to quantitatively measure threshold voltage shifts of a MOSFET. The circuit includes a programmable Vt reference sensor; a programmable Vt monitoring sensor; and a comparator for receiving inputs from the reference and monitoring sensors providing an output flag signal. The shifting of the MOSFET device voltage threshold monitors process variations, geometry sensitivity, plasma damage, stress, and hot carriers and other device damages. The same circuit also measures voltage differences between any two nodes in an integrated circuit chip or wafer.
    Type: Grant
    Filed: August 2, 2007
    Date of Patent: June 9, 2009
    Assignee: International Business Machines Corporation
    Inventors: Louis Hsu, Jong-Ru Guo, Ping-Chuan Wang, Zhijian Yang
  • Publication number: 20090142675
    Abstract: A reticle for an Optical Proximity Correction (OPC) test pattern and a method of manufacturing the same. In one example embodiment of the present invention, a reticle for an OPC test pattern includes test patterns formed apart from each other at regular intervals and dummy patterns for controlling a light transmission amount formed between the test patterns. The dummy patterns are formed apart from the test patterns at a predetermined interval.
    Type: Application
    Filed: October 20, 2008
    Publication date: June 4, 2009
    Applicant: DONGBU HITEK CO., LTD.
    Inventor: Jong Doo KIM
  • Publication number: 20090142983
    Abstract: A flat panel display and a method of manufacturing the same are disclosed. In one embodiment, the manufacturing method includes: i) preparing a substrate, ii) forming a plurality of subpixels on the substrate and iii) forming a light resonating layer including two or more layers on the subpixels, wherein the light resonating layer varies in thickness depending on the subpixels. According to at least one embodiment, it is possible to improve the brightness and the external light coupling efficiency. Further, it is possible to easily manufacture the light resonating layer with the structure in which the low refractive layers alternate with the high refractive layers.
    Type: Application
    Filed: February 5, 2009
    Publication date: June 4, 2009
    Applicant: Samsung Mobile Display Co., Ltd.
    Inventors: Young-Woo Song, Yoon-Chang Kim, Jong-Seok Oh, Sang-Hwan Cho, Ji-Hoon Ahn, Joon-Gu Lee, So-Young Lee, Jae-Heung Ha
  • Publication number: 20090140981
    Abstract: Provided is an image sensor and optical pointing system using the same. The image sensor has a plurality of pixels, each pixel including a photocell for receiving light and generating an analog signal having a voltage corresponding to a quantity of the received light, a comparator for, in response to a shutter control signal, comparing the analog signal of the photocell with an analog signal of an adjacent pixel to generate a digital signal for movement calculation, or comparing the analog signal of the photocell with a reference voltage to generate a digital signal for shutter control, and a switch for transferring the digital signal for movement calculation and the digital signal for shutter control in response to a pixel selection signal.
    Type: Application
    Filed: February 2, 2009
    Publication date: June 4, 2009
    Applicant: ATLAB INC.
    Inventors: Jong-Taek KWAK, Duck-Young JUNG
  • Patent number: D593966
    Type: Grant
    Filed: July 11, 2008
    Date of Patent: June 9, 2009
    Assignee: Alti-electronics Co., Ltd
    Inventors: Dong-Sel Kim, Chi Ok In, Jong Won Park