Patents by Inventor Jong-Chan Choi

Jong-Chan Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11940837
    Abstract: A display that includes a display panel and a window laminated with the display panel is presented. The display panel may include: a main panel region including a first side extending in a first direction and a second side extending in a second direction crossing the first direction; a first sub-panel region that is in contact with the first side and is bent; and a second sub-panel region that is in contact with the second side and is bent. A panel corner part of the main panel region adjacent to the first sub-panel region and the second sub-panel region is rounded.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: March 26, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Seung-Hwan Cho, Jong Hyun Choi, Ju Chan Park, Joo Sun Yoon, Jong Hyuk Lee
  • Patent number: 11737210
    Abstract: A printed circuit board includes an insulating layer; a metal pad disposed on one side of the insulating layer; a via hole penetrating through the insulating layer to expose at least a portion of the metal pad; and a via filling at least a portion of the via hole, wherein the via comprises a first metal layer and a second metal layer disposed on the first metal layer, and an average size of grains in the first metal layer and an average size of grains in the second metal layer are different from each other.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: August 22, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seong Jae Mun, Jong Chan Choi
  • Patent number: 11311876
    Abstract: An analysis chip for determining an efficient anticancer drug or anticancer drug combination for cancer cells, according to an embodiment of the present disclosure, includes a chamber which is a unit for analyzing single cancer cells, and a plurality of valves configured to regulate a fluid to be injected into the chamber, wherein the chamber includes a channel through which a fluid including an anticancer drug and a cell lysis buffer flows, a cell sorting part configured to focus cancer cells flowing along the channel, a cell capturing part configured to focus the cancer cells focused by the cell storing sorting part, and an antibody array configured to capture proteins secreted from the captured cancer cells and intracellular protein through cell lysis.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: April 26, 2022
    Assignee: GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Sung Yang, Jong Chan Choi
  • Publication number: 20220030713
    Abstract: A printed circuit board includes an insulating layer; a metal pad disposed on one side of the insulating layer; a via hole penetrating through the insulating layer to expose at least a portion of the metal pad; and a via filling at least a portion of the via hole, wherein the via comprises a first metal layer and a second metal layer disposed on the first metal layer, and an average size of grains in the first metal layer and an average size of grains in the second metal layer are different from each other.
    Type: Application
    Filed: April 27, 2021
    Publication date: January 27, 2022
    Inventors: Seong Jae MUN, Jong Chan CHOI
  • Publication number: 20210329794
    Abstract: A method for plating a printed circuit board, includes placing a substrate, including a through hole, in contact with a plating solution and disposing the substrate to face an electrode; and applying a pulsed current to each surface of the substrate, including applying pulsed currents of opposite polarity to both surfaces of the substrate at least once and applying pulsed forward currents to both surfaces of the substrate at least once, to plate from a middle to an end of the through hole.
    Type: Application
    Filed: June 29, 2021
    Publication date: October 21, 2021
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jong Chan CHOI, Young Kwon JEONG, Min Soo KIM, Seong Jae MUN
  • Patent number: 11096291
    Abstract: A method for plating a printed circuit board, includes placing a substrate, including a through hole, in contact with a plating solution and disposing the substrate to face an electrode; and applying a pulsed current to each surface of the substrate, including applying pulsed currents of opposite polarity to both surfaces of the substrate at least once and applying pulsed forward currents to both surfaces of the substrate at least once, to plate from a middle to an end of the through hole.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: August 17, 2021
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jong Chan Choi, Young Kwon Jeong, Min Soo Kim, Seong Jae Mun
  • Publication number: 20210078000
    Abstract: An analysis chip for determining an efficient anticancer drug or anticancer drug combination for cancer cells, according to an embodiment of the present disclosure, includes a chamber which is a unit for analyzing single cancer cells, and a plurality of valves configured to regulate a fluid to be injected into the chamber, wherein the chamber includes a channel through which a fluid including an anticancer drug and a cell lysis buffer flows, a cell sorting part configured to focus cancer cells flowing along the channel, a cell capturing part configured to focus the cancer cells focused by the cell storing part, and an antibody array configured to capture proteins secreted from the captured cancer cells and intracellular protein through cell lysis.
    Type: Application
    Filed: July 10, 2018
    Publication date: March 18, 2021
    Inventors: Sung YANG, Jong Chan CHOI
  • Publication number: 20200413548
    Abstract: A method for plating a printed circuit board, includes placing a substrate, including a through hole, in contact with a plating solution and disposing the substrate to face an electrode; and applying a pulsed current to each surface of the substrate, including applying pulsed currents of opposite polarity to both surfaces of the substrate at least once and applying pulsed forward currents to both surfaces of the substrate at least once, to plate from a middle to an end of the through hole.
    Type: Application
    Filed: December 11, 2019
    Publication date: December 31, 2020
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jong Chan CHOI, Young Kwon JEONG, Min Soo KIM, Seong Jae MUN
  • Patent number: 10827615
    Abstract: A printed circuit board includes a substrate having a first surface and a second surface, opposite to the first surface, and having a through-portion penetrating between the first surface and the second surface; and a through-via disposed in at least a portion of the through-portion, wherein the through-via includes a first metal layer having a first groove portion facing an interior of the through-portion from the first surface of the substrate and a second groove portion facing the interior of the through-portion from the second surface of the substrate, and the first metal layer has a first region, and a second region, having different average grain sizes.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: November 3, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jong Chan Choi, Young Kwon Jeong, Min Soo Kim, Seong Jae Mun
  • Publication number: 20090073880
    Abstract: A system and method is disclosed for controlling congestion in communications between an RSE and multiple OBEs in a DSRC system. In certain embodiments, a system and method for controlling congestion in communications between an RSE and multiple OBEs includes determining a priority level for each of multiple OBEs with respect to reserving a channel between each OBE and an RSE. Based on this determination, each OBE is assigned a waiting period based on their respective priority levels. The OBEs then send requests to reserve a channel to the RSE after waiting the assigned waiting periods.
    Type: Application
    Filed: December 27, 2006
    Publication date: March 19, 2009
    Inventors: Pu Sik Park, Dae Kyo Shin, Ki Tag Lim, Jae Min Kwak, Jong Chan Choi
  • Patent number: 7076004
    Abstract: The disclosed apparatus includes a main control unit (MCU) interface unit for adjusting the timing of data transmission, a register unit for storing control data, a threshold value, an offset value, and an error rate received from the MCU interface unit, and for outputting the stored data and values, a control logic unit for controlling selection of a threshold value, based on the control data stored in the register unit, a reference data selecting unit for selectively outputting, as threshold values, the threshold value and offset value respectively stored in the register unit or an external threshold value and an external offset value, under control of the control logic unit, and a data processing unit for determining, based on threshold values to be selectively outputted by the reference data selecting unit, whether or not the serial data received via a power line is valid data, and for outputting the data.
    Type: Grant
    Filed: July 31, 2001
    Date of Patent: July 11, 2006
    Assignee: Korea Electronics Technology Institute
    Inventors: Dong-Sun Kim, Doh-Kyung Kim, Jong-Chan Choi, Il-Hyun Chun, Chul Kim
  • Publication number: 20020181613
    Abstract: Disclosed are an apparatus and a method for adaptively detecting received signals for power line communication, which are capable of stably receiving desired data transmitted via a power line irrespective of variations in channel characteristics.
    Type: Application
    Filed: July 31, 2001
    Publication date: December 5, 2002
    Inventors: Dong-Sun Kim, Doh-Kyung Kim, Jong-Chan Choi, Il-Hyun Chun, Chul Kim