Patents by Inventor Jong-Chang Son

Jong-Chang Son has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240118071
    Abstract: A strain sensor may have a conductive elastic yarn including a first fiber having a predetermined length and a shape of a fiber yarn and a second fiber having electrical conductivity and a sheet shape. The strain sensor may have a pair of wiring members electrically connected to both ends of the conductive elastic yarn. The conductive elastic yarn, with the second fiber wrapped around the first fiber, is twisted in a coil shape.
    Type: Application
    Filed: February 1, 2023
    Publication date: April 11, 2024
    Inventors: Mi Yong Lee, Seong Hyun Son, Moon Young Jung, Jun Ho Song, Jong Seo Kim, Woo Chang Jeong, Gwan Mu Lee, Dong Seok Suh, Feng Wang
  • Patent number: 6434052
    Abstract: The disclosure is a nonvolatile memory device operable in a plurality of programming cycles, including, a memory cell array formed of a plurality of memory cells connected to bit lines and word lines, a plurality of data buffers for receiving a plurality of data bits, a plurality of write drive circuits disposed between the memory cell array and the data buffers, and a circuit for generating a plurality of selection signals for controlling the write drive circuits, in response to a current level of a power supply voltage. The selection signals determines the number of data bits programmed in one of the programming cycles.
    Type: Grant
    Filed: May 3, 1999
    Date of Patent: August 13, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Chang Son, Jong-Min Park
  • Patent number: 5809553
    Abstract: Nonvolatile memory devices and methods include an array of nonvolatile memory cells which are arranged in a plurality of rows and a plurality of columns. A plurality of word lines are also included, a respective one of which is connected to the nonvolatile memory cells in a respective one of a plurality of columns. A plurality of lockable cells are also included. A respective one of the lockable cells is connected to a respective one of the plurality of word lines. Each of the lockable cells stores therein a first or a second binary value. The first binary value indicates that nonvolatile memory cells which are connected to the corresponding column of word lines cannot be erased or reprogrammed. The second binary value indicates that nonvolatile memory cells which are connected to the corresponding column of words lines can be erased or programmed.
    Type: Grant
    Filed: December 20, 1996
    Date of Patent: September 15, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Do-Chan Choi, Jong-Chang Son