Abstract: Methods for depositing a metal containing material formed on a certain material of a substrate using an atomic layer deposition process for semiconductor applications are provided. In one embodiment, a method of forming a metal containing material on a substrate comprises pulsing a first gas precursor comprising a metal containing precursor to a surface of a substrate, pulsing a second gas precursor comprising a silicon containing precursor to the surface of the substrate, forming a metal containing material selectively on a first material of the substrate, and thermal annealing the metal containing material formed on the substrate.

Abstract: Methods for depositing a metal containing material formed on a certain material of a substrate using an atomic layer deposition process for semiconductor applications are provided. In one example, a method of forming a metal containing material on a substrate comprises pulsing a first gas precursor comprising a metal containing precursor to a surface of a substrate, pulsing a second gas precursor comprising a carboxylic acid to the surface of the substrate, and forming a metal containing material selectively on a first material of the substrate. In another example, a method of forming a metal containing material on a substrate includes selectively forming a metal containing layer on a silicon material or a metal material on a substrate than on an insulating material on the substrate by an atomic layer deposition process by alternatively supplying a metal containing precursor and a water free precursor to the substrate.

Abstract: Methods for depositing a metal containing material formed on a certain material of a substrate using an atomic layer deposition process for semiconductor applications are provided. In one example, a method of forming a metal containing material on a substrate comprises pulsing a first gas precursor comprising a metal containing precursor to a surface of a substrate, pulsing a second gas precursor comprising a carboxylic acid to the surface of the substrate, and forming a metal containing material selectively on a first material of the substrate. In another example, a method of forming a metal containing material on a substrate includes selectively forming a metal containing layer on a silicon material or a metal material on a substrate than on an insulating material on the substrate by an atomic layer deposition process by alternatively supplying a metal containing precursor and a water free precursor to the substrate.

Abstract: Methods for depositing a metal containing material formed on a certain material of a substrate using an atomic layer deposition process for semiconductor applications are provided. In one embodiment, a method of forming a metal containing material on a substrate comprises pulsing a first gas precursor comprising a metal containing precursor to a surface of a substrate, pulsing a second gas precursor comprising a silicon containing precursor to the surface of the substrate, forming a metal containing material selectively on a first material of the substrate, and thermal annealing the metal containing material formed on the substrate.

Abstract: Embodiments of the disclosure relate to selective metal silicide deposition methods. In one embodiment, a substrate having a silicon containing surface is heated and the silicon containing surface is hydrogen terminated. The substrate is exposed to sequential cycles of a MoF6 precursor and a Si2H6 precursor which is followed by an additional Si2H6 overdose exposure to selectively deposit a MoSix material comprising MoSi2 on the silicon containing surface of the substrate. Methods described herein also provide for selective native oxide removal which enables removal of native oxide material without etching bulk oxide materials.

Abstract: Embodiments of the disclosure relate to selective metal silicide deposition methods. In one embodiment, a substrate having a silicon containing surface is heated and the silicon containing surface is hydrogen terminated. The substrate is exposed to sequential cycles of a MoF6 precursor and a Si2H6 precursor which is followed by an additional Si2H6 overdose exposure to selectively deposit a MoSix material comprising MoSi2 on the silicon containing surface of the substrate.

Abstract: Embodiments of the disclosure relate to selective metal silicide deposition methods. In one embodiment, a substrate having a silicon containing surface is heated and the silicon containing surface is hydrogen terminated. The substrate is exposed to sequential cycles of a MoF6 precursor and a Si2H6 precursor which is followed by an additional Si2H6 overdose exposure to selectively deposit a MoSix material comprising MoSi2 on the silicon containing surface of the substrate. Methods described herein also provide for selective native oxide removal which enables removal of native oxide material without etching bulk oxide materials.

Abstract: Embodiments of the disclosure relate to selective metal silicide deposition methods. In one embodiment, a substrate having a silicon containing surface is heated and the silicon containing surface is hydrogen terminated. The substrate is exposed to sequential cycles of a MoF6 precursor and a Si2H6 precursor which is followed by an additional Si2H6 overdose exposure to selectively deposit a MoSix material comprising MoSi2 on the silicon containing surface of the substrate.

Abstract: 7-(3-Aminomethyl-4-methoxyiminopyrrolidin-1-yl)-1-cyclopropyl-6-fluoro-4-oxo-1,4-dihydro-1,8-naphthyridine-3-carboxylic acid methanesulfonate and hydrates thereof, processes for their preparation, pharmaceutical compositions comprising them, and their use in antibacterial therapy.

Abstract: A shading headgear is disclosed, which comprises a spherical headgear body which has a wearing hole at a rear lower side; an engaging band which is provided at a center portion of a rear side of the headgear body for elastically supporting a user's head; a plurality of interval maintaining protrusions which are formed at an inner upper side of the headgear body for maintaining a certain interval between the inner side of the headgear body and a user's head for thereby forming a ventilation space; a viewing window which is provided at a front side of the headgear body for obtaining a forward viewing; and a plurality of ventilation holes which are formed for ventilating the interior of the headgear body, wherein the headgear body is formed in a tinted type colored with a certain color so that a forward viewing is obtained, and ultraviolet ray is blocked off.

Abstract: A memory card including a printed circuit board having an electronic circuit device mounted thereto and at least one I/O pad disposed thereon. The printed circuit board and the electronic circuit device are at least partially encapsulated or covered by an encapsulant material which hardens into a body of the memory card, such body generally defining the outer appearance of the memory card. The I/O pads of the printed circuit board are exposed in the body. The body is formed to include one or more chamfers. Such chamfer(s) are sized and configured to minimize potential damage to the connection terminals or host socket of a device during the process of interfacing the memory card thereto.

Abstract: Disclosed is an electrode catalyst comprising a ruthenium (Ru)-rhodium (Rh) alloy. A membrane electrode assembly (MEA) comprising the same electrode catalyst and a fuel cell comprising the same membrane electrode assembly are also disclosed. The ruthenium-rhodium alloy catalyst has not only good oxygen reduction activity but also excellent methanol resistance compared to conventional platinum and platinum-based alloy catalysts, and thus can be used as high-quality and high-efficiency electrode catalyst having improved catalytic availability and stability.

Abstract: Disclosed are a flash memory device including a self aligned floating gate array, and a method of forming the self aligned floating gate array for the flash memory device. The flash memory device includes a plurality of device isolation layers formed by the oxidation of a silicon substrate, and a floating gate array formed in active device regions divided by the plurality of device isolation layers and in which sidewalls of the floating gate are self aligned to the plurality of device isolation layers. Therefore, it is possible to minimize the width of the device isolation regions regardless of the minimum line width as defined by process design rules.

Abstract: The present invention is related to a method and a system for collecting traffic information in real time using wireless communication wherein a traffic information of a shadow region outside a communicable range is transmitted to a RSE (Road Side Equipment) using a communication between OBEs (On-board Equipments). In accordance with the present invention, the traffic information related to a shadow region is relayed to the RSE using a two-way communication between the OBEs and/or the OBE and sensors to be collected by the RSEs and a central server.

Abstract: The method of forming a floating gate array of a flash memory device includes: (a) sequentially forming a tunnel oxide film, a floating gate forming film, a capping oxide film and a first nitride film on a semiconductor substrate with an active device region defined by device isolation films; (b) patterning the first nitride film to form a first nitride film pattern; (c) forming first oxide film spacers on sidewalls of the first nitride film pattern; (d) selectively removing the first nitride film pattern; (e) forming a plurality of second nitride film patterns separated by the first oxide film spacers on the capping oxide film; (f) selectively removing the first oxide film spacers interposed between the plurality of second nitride film patterns and a portion of the capping oxide film to expose a surface of the floating gate forming film between the second nitride film patterns; (g) forming a plurality of floating gate patterns by removing a portion of the floating gate forming film exposed using the second n

Abstract: Disclosed herein are a via hole having a fine hole land with which the density of circuit patterns can be increased and a method for forming the same. The method comprises: step 1 of forming a via hole in a copper clad laminate, coating an etching resist over the copper clad laminate, and forming a circuit pattern on the copper foil of the copper clad laminate; step 2 of forming a seed layer, coating a photoresist, and exposing an inner wall of the via hole; and step 3 of forming a plated layer on the inner wall of the via hole and removing the photoresist and the seed layer.

Abstract: The present invention makes a privacy protection area set on a video frame always match a masking block for the privacy protection area, thereby preventing video images taken from the privacy protection area from being exposed. One embodiment of the invention sets a masking zone corresponding to a privacy protection area on a taken video frame, keeps examining if the set masking zone does not match the privacy protection area, and adjusts the position of the masking zone on the video frame if it is determined that the masking zone does not match the privacy protection area, thereby preventing video signals taken from the initially set privacy protection area from being outputted.

Abstract: Disclosed is a multi-axial spinal pedicle screw engaged with a spinal rod and inserted into and fixed to a pedicle.

Abstract: The present invention relates to a black paste composition and an upper plate of plasma display panel using the same. The upper plate of plasma display panel comprises an upper substrate, a transparent electrode disposed on a predetermined position of the upper substrate, a bus electrode disposed on a predetermined position of the transparent electrode and a black matrix disposed between the transparent electrode and the bus electrode, and in each discharge cell. The black paste composition comprises about 5 to 25 parts by weight of a heat resistant black pigment; about 5 to 20 parts by weight of a glass powder; about 25 to 30 parts by weight of a binder; about 5 to 15 parts by weight of a photopolymerization monomer; about 1 to 10 parts by weight of a photopolymerization initiator; and about 20 to 35 parts by weight of a solvent.

Abstract: An electron emission display device includes an electron emission substrate; an electron emission device disposed on a region of the electron emission substrate; an auxiliary electrode electrically connected to the electron emission substrate at a portion other than the region where the electron emission device is disposed; an image forming substrate; an image implementing part corresponding to the electron emission device disposed on the image forming substrate; and a spacer for supporting the auxiliary electrode and the image forming substrate to be spaced apart from each other, the spacer comprising a conductive material. The space may be coated with a conductive material or doubly coated with two conductive materials, the two conductive materials having different resistances from each other.