Patents by Inventor Jong Chul Jeong

Jong Chul Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7425967
    Abstract: The present invention relates to a device and method for processing pixel rasterization in 3-Dimensional graphic engine. According to an embodiment of the present invention, a method of processing pixel rasterizaton in 3-Dimensional graphic engine comprises the steps of: receiving a plurality of fragment informations; verifying whether the coordinate of the fragment informations are adjacent to X axis or not; detecting depth values of old fragment; comparing the depth values of the old fragment; storing depth values of the newly inputted fragment after comparison; and storing color values, which are performed alpha blending, in a color cache. The apparatus for pixel rasterization processing in 3-Dimensional graphic engine includes a depth readout unit, a depth test unit, a depth entry unit, a color readout unit, an alpha blending unit, a color entry unit, a depth cache, a color cache and a frame memory.
    Type: Grant
    Filed: August 30, 2005
    Date of Patent: September 16, 2008
    Assignee: Core Logic Inc.
    Inventor: Jong Chul Jeong
  • Patent number: 7194499
    Abstract: A pipelined divider with a small lookup table is disclosed. The pipelined divider can greatly reduce the size of a lookup table with a low cost to overcome the problems involved in the conventional pipelined divider requiring a large lookup table due to its iterative operation type. The pipelined divider has a delay time of 3 cycles in a single precision, and can reduce a chip size by about ? in comparison to the existing pipelined divider.
    Type: Grant
    Filed: August 30, 2002
    Date of Patent: March 20, 2007
    Assignee: Yonsei University
    Inventors: Woong Jeong, Jong Chul Jeong, Woo Chan Park, Moon Key Lee, Tack Don Han
  • Publication number: 20040024806
    Abstract: A pipelined divider with a small lookup table is disclosed. The pipelined divider can greatly reduce the size of a lookup table with a low cost to overcome the problems involved in the conventional pipelined divider requiring a large lookup table due to its iterative operation type. The pipelined divider has a delay time of 3 cycles in a single precision, and can reduce a chip size by about ⅓ in comparison to the existing pipelined divider.
    Type: Application
    Filed: August 30, 2002
    Publication date: February 5, 2004
    Inventors: Woong Jeong, Jong Chul Jeong, Woo Chan Park, Moon Key Lee, Tack Don Han