Patents by Inventor Jong-chul Park

Jong-chul Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12062660
    Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a first etch stop layer, a second etch stop layer, and an interlayer insulation layer that are stacked on the gate structure, and a contact plug penetrating the interlayer insulation layer, the second etch stop layer, and the first etch stop layer and contacting a sidewall of the gate structure. The contact plug includes a lower portion having a first width and an upper portion having a second width. A lower surface of the contact plug has a stepped shape.
    Type: Grant
    Filed: July 12, 2022
    Date of Patent: August 13, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-Keun Lee, Jong-Chul Park, Sang-Hyun Lee
  • Publication number: 20240072335
    Abstract: An insulation device for a battery according to an embodiment includes: a first cover layer including a first hole; a second cover layer attached to one surface of the first cover layer and including a second hole; and a third cover layer disposed on the opposite surface to which the first cover layer is attached on the second cover layer, wherein the insulation device may include an insulation part inside, and the insulation part may include a functional filler.
    Type: Application
    Filed: February 5, 2021
    Publication date: February 29, 2024
    Inventor: Jong Chul PARK
  • Publication number: 20240072140
    Abstract: A semiconductor device includes, first and second source/drain patterns on an active pattern and spaced apart from each other, a first source/drain contact on the first source/drain pattern and including a first source/drain barrier film and a first source/drain filling film on the first source/drain barrier film, a second source/drain contact on the second source/drain pattern, and a gate structure on the active pattern between the first and second source/drain contacts and including a gate electrode, wherein a top surface of the first source/drain contact is lower than a top surface of the gate structure, and a height from a top surface of the active pattern to a top surface of the first source/drain barrier film is less than a height from the top surface of the active pattern to a top surface of the first source/drain filling film.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Inventors: Won Hyuk Lee, Jong Chul Park, Sang Duk Park, Hong Sik Shin, Do Haing Lee
  • Patent number: 11912895
    Abstract: The present invention relates to a fire resistant paint composition, to a production method for same and to a painting method for a fire resistant paint using same, and, one example of implementation of the present invention can provide a fire resistant paint composition comprising: between 70 and 95 wt. % of a binder; between 1 and 10 wt. % of an aerogel; between 1 and 5 wt. % of a foaming agent; and the remainder of water, and can provide a production method for same and a painting method for a fire resistant paint using same.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: February 27, 2024
    Assignee: AEROGEL R&D PTE. LTD.
    Inventors: Myung Je Roh, Young Chul Joung, Jong Chul Park, Min Woo Kim, Choon Soo Hahn, Dong Ho Jung, Do Young Park
  • Patent number: 11848364
    Abstract: A semiconductor device includes, first and second source/drain patterns on an active pattern and spaced apart from each other, a first source/drain contact on the first source/drain pattern and including a first source/drain barrier film and a first source/drain filling film on the first source/drain barrier film, a second source/drain contact on the second source/drain pattern, and a gate structure on the active pattern between the first and second source/drain contacts and including a gate electrode, wherein a top surface of the first source/drain contact is lower than a top surface of the gate structure, and a height from a top surface of the active pattern to a top surface of the first source/drain barrier film is less than a height from the top surface of the active pattern to a top surface of the first source/drain filling film.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: December 19, 2023
    Inventors: Won Hyuk Lee, Jong Chul Park, Sang Duk Park, Hong Sik Shin, Do Haing Lee
  • Patent number: 11804535
    Abstract: A semiconductor device with improved reliability and a method for fabricating the same are provided. The semiconductor device includes a substrate, a first spacer defining a gate trench on the substrate, and a gate electrode in the gate trench, wherein a height of an upper surface of the gate electrode adjacent to the first spacer increases in a direction away from the first spacer.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: October 31, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Jong Chul Park
  • Patent number: 11684808
    Abstract: The present invention relates to an ultrasonic surgical device in which a cartridge comprises: a cartridge housing having an empty inner space filled with a medium; an ultrasonic therapy part which is movably provided inside the cartridge housing and includes a transducer for generating focused ultrasonic waves; a window through which the ultrasonic waves generated from the transducer pass; and a driving part which moves the ultrasonic therapy part inside the cartridge housing, wherein, as the transducer moves in one direction, the distance between the window and the transducer repeatedly increases and decreases.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: June 27, 2023
    Inventor: Jong Chul Park
  • Publication number: 20220344331
    Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a first etch stop layer, a second etch stop layer, and an interlayer insulation layer that are stacked on the gate structure, and a contact plug penetrating the interlayer insulation layer, the second etch stop layer, and the first etch stop layer and contacting a sidewall of the gate structure. The contact plug includes a lower portion having a first width and an upper portion having a second width. A lower surface of the contact plug has a stepped shape.
    Type: Application
    Filed: July 12, 2022
    Publication date: October 27, 2022
    Inventors: In-Keun LEE, Jong-Chul PARK, Sang-Hyun LEE
  • Patent number: 11482288
    Abstract: A nonvolatile memory device is provided. A nonvolatile memory device comprises a word line, a bit line, a memory cell array including a first memory cell at an intersection region between the word line and the bit line, a word line voltage generating circuitry configured to generate a program voltage, the program voltage to be provided to the word line, a row decoder circuitry configured to receive the program voltage from the word line voltage generating circuitry and configured to provide the program voltage to the word line, a verification circuitry configured to generate a verification signal in response to verifying a success or a failure of programming of the first memory cell, and a control circuitry configured to apply the program voltage to the first memory cell in response to the verification signal, and configured to cut off the program voltage in response to the verification signal.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: October 25, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seul Bee Lee, Dong Hun Kwak, Jong-Chul Park
  • Publication number: 20220306833
    Abstract: The present invention relates to a composition for a moisture permeation preventing film for an electronic device, a method for forming a moisture permeation preventing film for an electronic device using the same, and an electronic device. The present invention can provide: a composition for a moisture permeation preventing film for an electronic device, the composition containing 1-10 wt % of an aerogel, 10-50 wt % of a solvent, 0.1-5 wt % of an additive, and the remainder binder; a method for forming a moisture permeation preventing film for an electronic device using the same; and an electronic device.
    Type: Application
    Filed: January 7, 2022
    Publication date: September 29, 2022
    Inventors: Myung Je ROH, Young Chul JOUNG, Jong Chul PARK, Min Woo KIM, Choon Soo HAHN, Mun Hyeong LEE, Dong Ho JUNG, Do Young PARK
  • Publication number: 20220289961
    Abstract: The present invention provides an artificial marble composition and an artificial marble using the same, the composition including (A) 100 parts by weight of an acrylic resin syrup, (B) 150 parts by weight to 250 parts by weight of an aluminum-based inorganic filler, (C) 8 parts by weight to 100 parts by weight of a phosphorus-based flame retardant, and (D) 35 parts by weight to 100 parts by weight of a magnesium-based flame retardant.
    Type: Application
    Filed: July 1, 2020
    Publication date: September 15, 2022
    Inventors: Jong Chul PARK, Wooyoung CHOI, Doo Kyo JEONG
  • Patent number: 11417652
    Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a first etch stop layer, a second etch stop layer, and an interlayer insulation layer that are stacked on the gate structure, and a contact plug penetrating the interlayer insulation layer, the second etch stop layer, and the first etch stop layer and contacting a sidewall of the gate structure. The contact plug includes a lower portion having a first width and an upper portion having a second width. A lower surface of the contact plug has a stepped shape.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: August 16, 2022
    Inventors: In-Keun Lee, Jong-Chul Park, Sang-Hyun Lee
  • Publication number: 20220109055
    Abstract: A semiconductor device includes, first and second source/drain patterns on an active pattern and spaced apart from each other, a first source/drain contact on the first source/drain pattern and including a first source/drain barrier film and a first source/drain filling film on the first source/drain barrier film, a second source/drain contact on the second source/drain pattern, and a gate structure on the active pattern between the first and second source/drain contacts and including a gate electrode, wherein a top surface of the first source/drain contact is lower than a top surface of the gate structure, and a height from a top surface of the active pattern to a top surface of the first source/drain barrier film is less than a height from the top surface of the active pattern to a top surface of the first source/drain filling film.
    Type: Application
    Filed: May 12, 2021
    Publication date: April 7, 2022
    Inventors: Won Hyuk Lee, Jong Chul Park, Sang Duk Park, Hong Sik Shin, Do Haing Lee
  • Patent number: 11261563
    Abstract: The present invention relates to a heat insulation composition, containing aerogel, with improved heat insulation and soundproofing properties, and a method for manufacturing a heat insulation fabric by using the same. The heat insulation composition is prepared by mixing solvent, aerogel powder, adhesive binder and carbon black powder, thereby improving the heat insulation property at an extremely low temperature and at a high temperature, and also enhancing the soundproofing property.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: March 1, 2022
    Assignee: ARMACELL JIOS AEROGELS LIMITED
    Inventors: Young chul Joung, Myung je Roh, Jong chul Park, Min woo Kim, Mun hyeong Lee, Choon Soo Hahn
  • Patent number: 11250911
    Abstract: An operating method of a storage device comprising a nonvolatile memory device comprising a first memory stack and a second memory stack, and a memory controller coupled to control the nonvolatile memory device, the operating method includes determining a first read voltage level with which a first memory cell of the first memory stack is successfully read, and performing a read operation on a second memory cell of the second memory stack using a second read voltage determined based on the first read voltage level.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: February 15, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong-chul Park, Youn-yeol Lee, Seul-bee Lee, Kyung-sub Lim
  • Patent number: 11164631
    Abstract: A nonvolatile memory device includes a first memory stack including first memory cells vertically stacked on each other, a second memory stack including memory cells vertically stacked on each other, and a control logic configured to set a voltage level of a second voltage applied for a second memory operation to one of the second memory cells in the second memory stack based on a first voltage applied to one of the first memory cells in the first memory stack in a first memory operation. The second memory stack is vertically stacked on the first memory stack. Cell characteristics of the one of the first memory cells is determined using the first voltage.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: November 2, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong-chul Park, Youn-yeol Lee, Seul-bee Lee, Kyung-sub Lim
  • Publication number: 20210249090
    Abstract: A nonvolatile memory device is provided. A nonvolatile memory device comprises a word line, a bit line, a memory cell array including a first memory cell at an intersection region between the word line and the bit line, a word line voltage generating circuitry configured to generate a program voltage, the program voltage to be provided to the word line, a row decoder circuitry configured to receive the program voltage from the word line voltage generating circuitry and configured to provide the program voltage to the word line, a verification circuitry configured to generate a verification signal in response to verifying a success or a failure of programming of the first memory cell, and a control circuitry configured to apply the program voltage to the first memory cell in response to the verification signal, and configured to cut off the program voltage in response to the verification signal.
    Type: Application
    Filed: April 28, 2021
    Publication date: August 12, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Seul Bee LEE, Dong Hun KWAK, Jong-Chul PARK
  • Publication number: 20210193225
    Abstract: An operating method of a storage device comprising a nonvolatile memory device comprising a first memory stack and a second memory stack, and a memory controller coupled to control the nonvolatile memory device, the operating method includes determining a first read voltage level with which a first memory cell of the first memory stack is successfully read, and performing a read operation on a second memory cell of the second memory stack using a second read voltage determined based on the first read voltage level.
    Type: Application
    Filed: March 9, 2021
    Publication date: June 24, 2021
    Inventors: Jong-chul PARK, Youn-yeol LEE, Seul-bee LEE, Kyung-sub LIM
  • Patent number: 11024397
    Abstract: A nonvolatile memory device is provided. A nonvolatile memory device comprises a word line, a bit line, a memory cell array including a first memory cell at an intersection region between the word line and the bit line, a word line voltage generating circuitry configured to generate a program voltage, the program voltage to be provided to the word line, a row decoder circuitry configured to receive the program voltage from the word line voltage generating circuitry and configured to provide the program voltage to the word line, a verification circuitry configured to generate a verification signal in response to verifying a success or a failure of programming of the first memory cell, and a control circuitry configured to apply the program voltage to the first memory cell in response to the verification signal, and configured to cut off the program voltage in response to the verification signal.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: June 1, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seul Bee Lee, Dong Hun Kwak, Jong-Chul Park
  • Publication number: 20210118509
    Abstract: A nonvolatile memory device includes a first memory stack including first memory cells vertically stacked on each other, a second memory stack including memory cells vertically stacked on each other, and a control logic configured to set a voltage level of a second voltage applied for a second memory operation to one of the second memory cells in the second memory stack based on a first voltage applied to one of the first memory cells in the first memory stack in a first memory operation. The second memory stack is vertically stacked on the first memory stack. Cell characteristics of the one of the first memory cells is determined using the first voltage.
    Type: Application
    Filed: December 7, 2020
    Publication date: April 22, 2021
    Inventors: Jong-chul PARK, Youn-yeol LEE, Seul-bee LEE, Kyung-sub LIM