Patents by Inventor Jong-gi Lee

Jong-gi Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10901184
    Abstract: An optical imaging system includes a first lens, a second lens, a third lens, a fourth lens, a fifth lens, and a sixth lens sequentially arranged in numerical order from an object side of the optical imaging system toward an imaging plane of the optical imaging system and each having a refractive power, wherein an entire field of view of the optical imaging system is 50° or greater, and TTL/f<1.0, where TTL is a distance from an object-side surface of the first lens to the imaging plane, and f is an overall focal length of the optical imaging system.
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: January 26, 2021
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Ju Hwa Son, Jong Gi Lee, Yong Joo Jo, Ju Sung Park
  • Publication number: 20190250378
    Abstract: An optical imaging system includes a first lens, a second lens, a third lens, a fourth lens, a fifth lens, and a sixth lens sequentially arranged in numerical order from an object side of the optical imaging system toward an imaging plane of the optical imaging system and each having a refractive power, wherein an entire field of view of the optical imaging system is 50° or greater, and TTL/f<1.0, where TTL is a distance from an object-side surface of the first lens to the imaging plane, and f is an overall focal length of the optical imaging system.
    Type: Application
    Filed: October 5, 2018
    Publication date: August 15, 2019
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Ju Hwa SON, Jong Gi LEE, Yong Joo JO, Ju Sung PARK
  • Patent number: 10257605
    Abstract: Disclosed herein is an earphone protection device. The earphone protection device includes a pair of earphone covers and a pair of adjustment cables. An outer first space and an inner second space are formed inside each of the earphone covers. The first space provides a path adapted to guide earphones through accommodation, and also provides a coupling structure so that the earphone covers are assembled together and closed after the earphones have been accommodated inside the earphone covers.
    Type: Grant
    Filed: August 21, 2017
    Date of Patent: April 9, 2019
    Inventor: Jong Gi Lee
  • Publication number: 20190028798
    Abstract: Disclosed herein is an earphone protection device. The earphone protection device includes a pair of earphone covers and a pair of adjustment cables. An outer first space and an inner second space are formed inside each of the earphone covers. The first space provides a path adapted to guide earphones through accommodation, and also provides a coupling structure so that the earphone covers are assembled together M and closed after the earphones have been accommodated inside the earphone covers.
    Type: Application
    Filed: August 21, 2017
    Publication date: January 24, 2019
    Inventor: Jong Gi LEE
  • Patent number: 8796597
    Abstract: An in-line package apparatus includes a first treating unit, an input storage unit, a heating unit and an output storage unit. The first treating unit performs a ball attach process or a chip mount process. A processing object that a process is completed in the first treating unit is received in a magazine so as to be vertically stacked and a plurality of magazines each having one or more processing objects is stored in an input stacker. The heating unit performs a reflow process on the processing objects in the magazine stored in the input stacker by an induction heating method. A processing object that a reflow process is completed is received in a magazine and then stored in an output stacker.
    Type: Grant
    Filed: November 18, 2008
    Date of Patent: August 5, 2014
    Assignee: SAMSUNG Electronics Co., Ltd.
    Inventors: Min-Ill Kim, Jong-Gi Lee, Kwang-Yong Lee, Ki-Kwon Jeong
  • Patent number: 8772084
    Abstract: A first semiconductor chip having a first projection electrode formed on an upper surface thereof is prepared. A second semiconductor chip having a second projection electrode is mounted on the first semiconductor chip to expose the first projection electrode. An insulating film is formed between the first projection electrode and the second projection electrode. A groove is formed in the insulating film. An interconnection configured to fill an inside of the groove and connected to the first projection electrode and the second projection electrode is formed.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: July 8, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Gi Lee, Kwang-Yong Lee, Min-Ho Lee
  • Patent number: 8664762
    Abstract: In one embodiment, a semiconductor package may include a semiconductor chip having a chip pad formed on a first surface thereof, a sealing member for sealing the semiconductor chip and exposing the first surface of the semiconductor chip, a conductive wiring overlying a part of the first surface of the semiconductor chip and directly contacting a part of an upper surface of the sealing member. The conductive wiring further contacts the pad. The semiconductor package may also include an encapsulant covering the conductive wiring and having openings for exposing parts of the conductive wiring.
    Type: Grant
    Filed: August 26, 2012
    Date of Patent: March 4, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-gi Lee, Sang-wook Park, Ji-seok Hong
  • Publication number: 20130078763
    Abstract: A first semiconductor chip having a first projection electrode formed on an upper surface thereof is prepared. A second semiconductor chip having a second projection electrode is mounted on the first semiconductor chip to expose the first projection electrode. An insulating film is formed between the first projection electrode and the second projection electrode. A groove is formed in the insulating film. An interconnection configured to fill an inside of the groove and connected to the first projection electrode and the second projection electrode is formed.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 28, 2013
    Applicant: Samsung Electronics Co., Ltd
    Inventors: Jong-Gi LEE, Kwang-Yong Lee, Min-Ho Lee
  • Publication number: 20120313244
    Abstract: In one embodiment, a semiconductor package may include a semiconductor chip having a chip pad formed on a first surface thereof, a sealing member for sealing the semiconductor chip and exposing the first surface of the semiconductor chip, a conductive wiring overlying a part of the first surface of the semiconductor chip and directly contacting a part of an upper surface of the sealing member. The conductive wiring further contacts the pad. The semiconductor package may also include an encapsulant covering the conductive wiring and having openings for exposing parts of the conductive wiring.
    Type: Application
    Filed: August 26, 2012
    Publication date: December 13, 2012
    Inventors: Jong-gi Lee, Sang-wook Park, Ji-seok Hong
  • Patent number: 8288210
    Abstract: In one embodiment, a semiconductor package may include a semiconductor chip having a chip pad formed on a first surface thereof, a sealing member for sealing the semiconductor chip and exposing the first surface of the semiconductor chip, a conductive wiring overlying a part of the first surface of the semiconductor chip and directly contacting a part of an upper surface of the sealing member. The conductive wiring further contacts the pad. The semiconductor package may also include an encapsulant covering the conductive wiring and having openings for exposing parts of the conductive wiring.
    Type: Grant
    Filed: March 6, 2011
    Date of Patent: October 16, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-gi Lee, Sang-wook Park, Ji-seok Hong
  • Patent number: 8283430
    Abstract: The present invention relates to a composition for manufacturing a carboxylic group-containing polymer and a carboxylic group-containing polymer manufactured by using the same. More particularly, the present invention relates to a composition for manufacturing a carboxylic group-containing polymer comprising an allyl monomer having a long chain of a hydrophilic part containing alkylene oxide and a side chain of a hydrophobic part containing fatty acid ester as a dispersion promoter; a vinyl group-containing unsaturated carboxylic acid; a vinyl group-containing crosslinking agent; and a radical polymerization initiator, and a carboxylic group-containing polymer manufactured by using the same wherein the polymer can be dispersed in water without stirring, its dispersion solution has low viscosity, and its neutralized viscous solution obtained by alkali neutralization has high viscosity and transparency.
    Type: Grant
    Filed: February 13, 2008
    Date of Patent: October 9, 2012
    Assignee: AK Chemtech Co. Ltd.
    Inventors: Kyo-Duck Ahn, Jong-Gi Lee, Choun-San Kim, Young-Shin Kim
  • Patent number: 8254140
    Abstract: A mounting substrate includes a substrate, a bonding pad and an induction heating pad. The bonding pad is formed on the substrate, and adhered to a solder ball to mount a semiconductor chip on the substrate. The induction heating pad is disposed adjacent to the bonding pad, the induction heating pad being induction heated by an applied alternating magnetic field to reflow the solder ball. The induction heating pad having a diameter greater than a skin depth in response to the frequency of the applied alternating magnetic field is selectively induction heated in response to a low frequency band of the alternating magnetic field. Accordingly, during a reflow process for a solder ball, the semiconductor chip may be mounted on the mounting substrate to complete a semiconductor package without damaging the mounting substrate, to thereby improve the reliability of the completed semiconductor package.
    Type: Grant
    Filed: January 22, 2009
    Date of Patent: August 28, 2012
    Assignee: SAMSUNG Electronics Co., Ltd.
    Inventors: Kwang-Yong Lee, Jong-Gi Lee, Sun-Won Kang, Ji-Seok Hong
  • Publication number: 20110318876
    Abstract: In one embodiment, a semiconductor package may include a semiconductor chip having a chip pad formed on a first surface thereof, a sealing member for sealing the semiconductor chip and exposing the first surface of the semiconductor chip, a conductive wiring overlying a part of the first surface of the semiconductor chip and directly contacting a part of an upper surface of the sealing member. The conductive wiring further contacts the pad. The semiconductor package may also include an encapsulant covering the conductive wiring and having openings for exposing parts of the conductive wiring.
    Type: Application
    Filed: March 6, 2011
    Publication date: December 29, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong-gi Lee, Sang-wook Park, Ji-seok Hong
  • Patent number: 7759795
    Abstract: Provided is a printed circuit board having a bump interconnection structure that improves reliability between interconnection layers. Also provided is a method of fabricating the printed circuit board and semiconductor package using the printed circuit board. According to one embodiment, the printed circuit board includes a plurality of bumps formed on a resin layer between a first interconnection layer and a second interconnection layer. The second interconnection layer includes insertion holes corresponding to upper portions of the bumps so that the upper portions of the bumps protrude from the second interconnection layer. The upper portion of at least one of the bumps includes a rivet portion having a diameter greater that the diameter of the corresponding insertion hole to reliably interconnect the first and second interconnection layers.
    Type: Grant
    Filed: September 5, 2007
    Date of Patent: July 20, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Lyong Kim, Young-Shin Choi, Jong-Gi Lee, Kun-Dae Yeom, Chul-Yong Jang, Hyun-Jong Woo
  • Publication number: 20100144137
    Abstract: A method of interconnecting semiconductor devices by using capillary motion, thereby simplifying fabricating operations, reducing fabricating costs, and simultaneously filling of through-silicon-vias (TSVs) and interconnecting semiconductor devices. The method includes preparing a first semiconductor device in which first TSVs are formed, positioning solder balls respectively on the first TSVs, performing a back-lap operation on the first semiconductor device, positioning a second semiconductor device, in which second TSVs are formed, above the first semiconductor device on which the solder balls are positioned, and performing a reflow operation such that the solder balls fill the first and second TSVs due to capillary motion.
    Type: Application
    Filed: October 15, 2009
    Publication date: June 10, 2010
    Applicant: Samsung Electronics Co., Ltd
    Inventors: Kwang-yong LEE, Jong-gi Lee, Min-ill Kim, Min-seung Yoon, Ji-seok Hong
  • Publication number: 20090318653
    Abstract: The present invention relates to a composition for manufacturing a carboxylic group-containing polymer and a carboxylic group-containing polymer manufactured by using the same. More particularly, the present invention relates to a composition for manufacturing a carboxylic group-containing polymer comprising an allyl monomer having a long chain of a hydrophilic part containing alkylene oxide and a side chain of a hydrophobic part containing fatty acid ester as a dispersion promoter; a vinyl group-containing unsaturated carboxylic acid; a vinyl group-containing crosslinking agent; and a radical polymerization initiator, and a carboxylic group-containing polymer manufactured by using the same wherein the polymer can be dispersed in water without stirring, its dispersion solution has low viscosity, and its neutralized viscous solution obtained by alkali neutralization has high viscosity and transparency.
    Type: Application
    Filed: February 13, 2008
    Publication date: December 24, 2009
    Applicant: AK CHEMTECH CO., LTD.
    Inventors: Kyo-Duck Ahn, Jong-Gi Lee, Choun-San Kim, Young-Shin Kim
  • Patent number: 7612450
    Abstract: Provided are a semiconductor package and a method of fabricating the same. The semiconductor package includes a semiconductor chip, and a plurality of conductive balls, e.g., solder balls formed on a joint surface of the semiconductor chip. A dummy board includes openings aligned with the solder balls and is bonded to the joint surface of the semiconductor chip. An adhesive material is interposed between the semiconductor chip and the dummy board to adhere the dummy board to the semiconductor chip. The adhesive material is applied on an adhesion surface of the dummy board adhered to a joint surface of the semiconductor chip. The dummy board is adhered to the joint surface of the semiconductor chip such that the solder balls are aligned with the openings. Cheap underfill materials can be selectively used, and a process time for reflow and curing of the adhesive material can be greatly reduced.
    Type: Grant
    Filed: June 19, 2007
    Date of Patent: November 3, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Gi Lee, Tae-Joo Hwang
  • Publication number: 20090188704
    Abstract: A mounting substrate includes a substrate, a bonding pad and an induction heating pad. The bonding pad is formed on the substrate, and adhered to a solder ball to mount a semiconductor chip on the substrate. The induction heating pad is disposed adjacent to the bonding pad, the induction heating pad being induction heated by an applied alternating magnetic field to reflow the solder ball. The induction heating pad having a diameter greater than a skin depth in response to the frequency of the applied alternating magnetic field is selectively induction heated in response to a low frequency band of the alternating magnetic field. Accordingly, during a reflow process for a solder ball, the semiconductor chip may be mounted on the mounting substrate to complete a semiconductor package without damaging the mounting substrate, to thereby improve the reliability of the completed semiconductor package.
    Type: Application
    Filed: January 22, 2009
    Publication date: July 30, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Kwang-Yong LEE, Jong-Gi Lee, Sun-Won Kang, Ji-Seok Hong
  • Publication number: 20090127314
    Abstract: An in-line package apparatus includes a first treating unit, an input storage unit, a heating unit and an output storage unit. The first treating unit performs a ball attach process or a chip mount process. A processing object that a process is completed in the first treating unit is received in a magazine so as to be vertically stacked and a plurality of magazines each having one or more processing objects is stored in an input stacker. The heating unit performs a reflow process on the processing objects in the magazine stored in the input stacker by an induction heating method. A processing object that a reflow process is completed is received in a magazine and then stored in an output stacker.
    Type: Application
    Filed: November 18, 2008
    Publication date: May 21, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Min-Ill KIM, Jong-Gi Lee, Kwang-Yong Lee, Ki-Kwon Jeong
  • Publication number: 20090026596
    Abstract: In certain embodiments, a lead frame includes a paddle, a plurality of inner leads, first outer leads, and a second outer lead. The plurality of inner leads can be arranged at a side face of the paddle. The first outer leads can extend from the inner leads along a first direction and can be arranged at a substantially central portion of the side face of the paddle. Furthermore, each of the first outer leads can have a first area. The second outer lead can be arranged at an edge portion of the side face of the paddle and can be supported by the paddle. The second outer lead can have a second area that is larger than the first area.
    Type: Application
    Filed: July 23, 2008
    Publication date: January 29, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sang-Wook PARK, Jong-Gi LEE, Kun-Dae YEOM, Sung-Ki LEE, Ji-Seok HONG