Abstract: Open block-based read offset compensation in read operation of memory device is disclosed. For example, a memory device includes an array of memory cells arranged in a plurality of blocks and a peripheral circuit coupled to the array of memory cells. The peripheral circuit is configured to determine that a block of the blocks is an open block based on an open block information, and in response to the block of the blocks being an open block, perform a read operation on a memory cell of the array of memory cells in the block using a compensated read voltage. The compensated read voltage has an offset from a default read voltage of the block.

Abstract: Disclosed are removable pressure sensitive adhesive compositions (PSAs) useful with facestocks and/or packaging labels designed to be removed in the recycling of polymeric packaging. The PSAs of the invention include (a) at least one monomer which may undergo free radical polymerization and whose homopolymer has a glass transition temperature of less than or equal to 10° C., (b) at least one mono-olefinically unsaturated monomer having aldehyde or ketone functionality, and (c) an effective amount of at least one polyhydrazide crosslinker having hydrazine functionality. The PSA composition of the invention exhibits a peel adhesion value of between about 0.4 lbs/in (70 N/m) and about 4 lbs/in (700 N/m), and the percent film remaining on the polymeric packaging after a sink-float testing is 0% to about 8%.

Abstract: A labeled package includes a polymeric package, a filmic facestock material as a label on the polymeric package, and a pressure sensitive adhesive adhering the filmic facestock material to the polymeric package. The pressure sensitive adhesive composition includes a monomer mixture, which includes at least one monomer that is free radical polymerizable and whose homopolymer has a glass transition temperature of less than or equal to 10° C.; at least one mono-olefinically unsaturated monomer having aldehyde or ketone functionality; and at least one polyhydrazide crosslinker having hydrazine functionality.

Abstract: Disclosed are removable pressure sensitive adhesive compositions (PSAs) useful with facestocks and/or packaging labels designed to be removed in the recycling of polymeric packaging. The PSAs of the invention include (a) at least one monomer which may undergo free radical polymerization and whose homopolymer has a glass transition temperature of less than or equal to 10° C., (b) at least one mono-olefinically unsaturated monomer having aldehyde or ketone functionality, and (c) an effective amount of at least one polyhydrazide crosslinker having hydrazine functionality. The PSA composition of the invention exhibits a peel adhesion value of between about 0.4 lbs/in (70 N/m) and about 4 lbs/in (700 N/m), and the percent film remaining on the polymeric packaging after a sink-float testing is 0% to about 8%.

Abstract: A labeled package includes a polymeric package, a filmic facestock material as a label on the polymeric package, and a pressure sensitive adhesive adhering the filmic facestock material to the polymeric package. The pressure sensitive adhesive composition includes a monomer mixture, which includes at least one monomer that is free radical polymerizable and whose homopolymer has a glass transition temperature of less than or equal to 10° C.; at least one mono-olefinically unsaturated monomer having aldehyde or ketone functionality; and at least one polyhydrazide crosslinker having hydrazine functionality.

Abstract: Disclosed are removable pressure sensitive adhesive compositions (PSAs) useful with facestocks and/or packaging labels designed to be removed in the recycling of polymeric packaging. The PSAs of the invention include (a) at least one monomer which may undergo free radical polymerization and whose homopolymer has a glass transition temperature of less than or equal to 10° C., (b) at least one mono-olefinically unsaturated monomer having aldehyde or ketone functionality, and (c) an effective amount of at least one polyhydrazide crosslinker having hydrazine functionality. The PSA composition of the invention exhibits a peel adhesion value of between about 0.4 lbs/in (70 N/m) and about 4 lbs/in (700 N/m), and the percent film remaining on the polymeric packaging after a sink-float testing is 0% to about 8%.

Abstract: Disclosed are removable pressure sensitive adhesive compositions (PSAs) useful with facestocks and/or packaging labels designed to be removed in the recycling of polymeric packaging. The PSAs of the invention include (a) at least one monomer which may undergo free radical polymerization and whose homopolymer has a glass transition temperature of less than or equal to 10° C., (b) at least one mono-olefinically unsaturated monomer having aldehyde or ketone functionality, and (c) an effective amount of at least one polyhydrazide crosslinker having hydrazine functionality. The PSA composition of the invention exhibits a peel adhesion value of between about 0.4 lbs/in (70 N/m) and about 4 lbs/in (700 N/m), and the percent film remaining on the polymeric packaging after a sink-float testing is 0% to about 8%.

Abstract: A portable solar energy collecting device includes a container configured with an accommodating space therein and including a transparent housing. The transparent housing is formed with a vacuum chamber defined between the inner and outer surrounding walls and surrounding the accommodating space. A heat-absorbing unit is disposed in the accommodating space in the container, absorbs solar energy when the housing is irradiated by solar radiation, and converts the solar energy into thermal energy that is accumulated in the accommodating space in the container.

Abstract: A system for booting a microprocessor controlled system wherein a basic interface between the processor and peripheral devices is stored and retrieved from the general purpose application and file storage device.

Abstract: A method and system for booting a microprocessor controlled device. A microprocessor that is designed to read from a linear storage device executes code from a non linear storage device through an interface or emulator that writes and retrieves specially formatted boot instructions to/from the non linear storage device.

Abstract: A system for booting a microprocessor controlled system wherein a basic interface between the processor and peripheral devices is copied from an application and file storage device into random access memory without usage of the microprocessor or need for a non-volatile code storage device.

Abstract: A system for booting a microprocessor controlled system wherein a basic interface between the processor and peripheral devices is copied from an application and file storage device into random access memory without usage of the microprocessor or need for a non-volatile code storage device.

Abstract: A method and system for booting a microprocessor controlled device. A microprocessor that is designed to read from a linear storage device executes code from a non linear storage device through an interface or emulator that writes and retrieves specially formatted boot instructions to/from the non linear storage device.

Abstract: A method and system for booting a microprocessor controlled device. A microprocessor that is designed to read from a linear storage device executes code from a non linear storage device through an interface or emulator that writes and retrieves specially formatted boot instructions to/from the non linear storage device.

Abstract: A method and system for booting a microprocessor controlled device. A microprocessor that is designed to read from a linear storage device executes code from a non linear storage device through an interface or emulator that writes and retrieves specially formatted boot instructions to/from the non linear storage device.

Abstract: A system for booting a microprocessor controlled system wherein a basic interface between the processor and peripheral devices is copied from an application and file storage device into random access memory without usage of the microprocessor or need for a non-volatile code storage device.

Abstract: Formulations and a process are disclosed for chemically treating a surface of a product made from magnesium alloys. One formulation comprises an acid pickle comprising hydrofluoric acid and a binary alcohol and a second formulation comprises a conversion solution comprising nitric acid, permanganate, and ammonium acid difluoride. The process comprises degreasing the product with alkaline solution, rinsing the product with water, pickling the product with the acid pickle, rinsing the product with water, modifying the product using the modifying solution, rinsing the product with purified water, and drying the product by heating.

Abstract: A semiconductor static memory cell with two cross-coupled inverters and two transmission gates for coupling two bit lines uses all minimum size (gate length and gate width) MOSFETs to achieve minimum area. This minimum dimension is rendered possible by using a higher threshold voltage for the transmission gate MOSFET than the threshold voltage of pull-down MOSFET of the inverter. Different threshold voltages are obtained with selective ion implantation, different gate oxide thicknesses and/or different gate doping.

Abstract: A semiconductor static memory cell with two cross-coupled inverters and two transmission gates for coupling two bit lines uses all minimum size (gate length and gate width) MOSFETs to achieve minimum area. This minimum dimension is rendered possible by using a higher threshold voltage for the transmission gate MOSFET than the threshold voltage of pull-down MOSFET of the inverter. Different threshold voltages are obtained with selective ion implantation, different gate oxide thicknesses and/or different gate doping.

Abstract: The memory cells of a read-only memory are connected in parallel between adjacent bus-bit lines. The selection of tile sub-bit lines is through a selector logic decoder. The decoder has many rows of MOSFETs connected in series. Only one of MOSFETs in a row between an adjacent bit line bus and a virtual ground bus is active and controllable by a sub-word line selection signal with other MOSFETs non-conducting and connected between two adjacent sub-bit lines. These active MOSFETs in different rows are connected in series. One of these active MOSFETs is coupled to a main bit line, and another of these active MOSFETs is coupled to a virtual ground. When the active MOSFET is open, the main bit line signal and the virtual signal appear between the corresponding memory cells between these two corresponding sub-bit lines and are sensed. With this structure, the accessed memory cell is coupled between the main bit line and the virtual ground line through a number of series MOSFETs.