Patents by Inventor Jong Hahn

Jong Hahn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6376680
    Abstract: An impurity-free biologically active mixture of 2-methyl-4-isothiazolin-3-one and 5-chloro-2-methyl-4-isothiazolin-3-one, which is useful as a biocide in various products, can be prepared by reacting N-methyl-3-mercaptopropionamide or N,N′-dimethyl-3,3′-dithiodipropionamide or a mixture thereof dissolved in a first organic solvent with sulfuryl chloride dissolved in a second organic solvent, which is different from the first organic solvent, at a temperature ranging from 5 to 20° C. and, optionally, centrifuging the resulting product mixture to obtain the desired mixture substantially free of 4,5-dichloro-2-methyl-4-isothiazolin-3-one impurity.
    Type: Grant
    Filed: May 24, 2001
    Date of Patent: April 23, 2002
    Assignee: SK Chemicals Co., Ltd.
    Inventors: Jin-Man Kim, Jin-Soo Lim, Seung-Hwan Kim, Soon-Jong Hahn
  • Patent number: 6314487
    Abstract: The present invention relates to a routing control apparatus for performing a round robin arbitration and an adaptive routing control. The present invention relates to a routing controller for performing an arbitration and a routing control which are nucleus functions of the crossbar routing switch and, in particular, to a normal routing controller unit for performing a priority based round robin arbitration and an adaptive routing controller unit for performing an adaptive routing control by adding an adaptive routing switch logic to the normal routing controller.
    Type: Grant
    Filed: December 11, 1998
    Date of Patent: November 6, 2001
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jong Seok Hahn, Won Sae Sim, Woo Jong Hahn, Suk Han Yoon
  • Patent number: 6108766
    Abstract: The present invention relates to a structure of processor having a plurality of main processors and sub processors, and a method for sharing the sub processors, wherein a method is used for preserving a state of a register file by using a shadow register file when main processor inputs an instruction of the sub processor in case that an exceptional situation happens under processing of an instruction of sub processor and for rolling back thereafter the preserved state in case there is an information of occurrence of the exceptional situation from the sub processor. Also, in order to solve a problem that cache efficiency is reduced due to the use of a first cache which is relatively small and frequently used, there is suggested a first cache bypassing function. Further, in order to solve a problem that its processing speed is reduced when the main processor transfers instructions in sub processor, it is possible to improve the processors' parallelism and its efficiency by providing an extra register file.
    Type: Grant
    Filed: August 10, 1998
    Date of Patent: August 22, 2000
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Woo Jong Hahn, Kyong Park, Suk Han Yoon
  • Patent number: 6072056
    Abstract: A method of preparing water free isothiazolone having the steps of obtaining an extract from an aqueous solution containing isothiazolone by using a halogenationed hydrocarbon or nitrated hydrocarbon, removing the halogenationed hydrocarbon or nitrated hydrocarbon from the extract, and adding a organic solvent such as glycol, alcohol and glycol ether provides a water free isothiazolone having a high stability without forming wastes and harmful gas.
    Type: Grant
    Filed: June 16, 1998
    Date of Patent: June 6, 2000
    Assignee: SK Chemical
    Inventors: Seung-Hwan Kim, Jeong-Ho Park, Jin-Man Kim, Ki-Seung Choi, Myung-Ho Cho, Soon-Jong Hahn
  • Patent number: 6061345
    Abstract: A routing switch for constructing an interconnection network of a parallel processing computer is disclosed. A purpose of the present invention is to provide a crossbar routing switch for a hierarchical interconnection network which has an expandability of a data length and an expandability of a hierarchical structure. The crossbar routing switch for a hierarchical interconnection network in accordance with the present invention comprises a predetermined number of input control units for controlling one input port to perform the manipulation of input data; a crossbar core unit for analyzing a data transmission request by the input control unit and outputting the corresponding data; and a predetermined number of output control unit for controlling one output port and receiving the output data from the crossbar core unit to output it to the output port.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: May 9, 2000
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jong Seok Hahn, Kyoung Park, Woo Jong Hahn, Kee Wook Rim
  • Patent number: 6055599
    Abstract: The present invention relates to a hierarchical crossbar inter-connection network for a cluster-based parallel processing computer. A crossbar network is composed of the "n" number of crossbar switches which is byte sliced, eight links for connecting eight nodes, and two links for connecting other clusters. In addition, one low-level cluster is formed by connecting a maximum of eight processing nodes between the two crossbar networks, and one high-level cluster is formed with a maximum of eight low-level clusters and the four crossbar networks. Moreover, one next high-level clusters formed with a maximum of eight high-level clusters and the eight crossbar networks for scalability.
    Type: Grant
    Filed: August 31, 1998
    Date of Patent: April 25, 2000
    Assignee: Electronics & Telecommunications Research Institute
    Inventors: Jong-Seok Han, Kyoung Park, Won-Sae Sim, Woo-Jong Hahn, Kee-Wook Rim
  • Patent number: 5751934
    Abstract: A non-blocking fault tolerant gamma network for a multi-processor system is disclosed, including: N dual links respectively connected to n source nodes, and for transmitting data input; a first stage made up with n 2.times.3 switching devices for outputting data transmitted from the N dual links; a second stage made up with n 3.times.4 switching devices for outputting data output from the first stage; a third stage to n-1 stage made up with (n-2).times.N 4.times.4 switching devices for receiving data output from the second stage at the third stage and outputting the data to n-1 stage; an n stage made up with n 4.times.
    Type: Grant
    Filed: November 12, 1996
    Date of Patent: May 12, 1998
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jong-Seok Han, Woo-Jong Hahn, Suk-Han Yoon