Patents by Inventor Jong Han Lee

Jong Han Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260082690
    Abstract: A semiconductor device includes a lower interlayer insulating layer, an insulating pattern extending in a first direction on the lower interlayer insulating layer, a plurality of nanosheets on the insulating pattern and spaced apart in a third direction, an active cut penetrating the lower interlayer insulating layer, the insulating pattern and the plurality of nanosheets, the active cut extending in a second direction and comprising an upper surface extending between opposing first and second sidewalls, and a first gate electrode extending in the second direction on the insulating pattern, wherein the first gate electrode includes a first portion in contact with the first sidewall of the active cut in the second direction, a second portion in contact with the upper surface of the active cut, and a third portion in contact with the second sidewall of the active cut, where the second connects the first portion and the third portion.
    Type: Application
    Filed: April 30, 2025
    Publication date: March 19, 2026
    Inventors: Jeong Hyeon Lee, Min Seok Jo, Hyung Koo Kang, Jong Han Lee
  • Patent number: 12557374
    Abstract: A semiconductor device including a substrate including first and second regions along a first direction, and a third region between the first region and the second region, an active pattern extending in the first direction, on the substrate, and first to third gate electrodes spaced apart from each other and extending in a second direction, on the active pattern, the active pattern of the first region including first semiconductor patterns spaced apart from each other and penetrating the first gate electrode, the active pattern of the second region including second semiconductor patterns spaced apart from each other and penetrating the second gate electrode, the active pattern of the third region including a transition pattern protruding from the substrate and intersecting the third gate electrode and including a sacrificial pattern and a third semiconductor pattern alternately stacked on the third region and including different materials from each other.
    Type: Grant
    Filed: June 7, 2024
    Date of Patent: February 17, 2026
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seong-Ho Song, Jong Han Lee, Jong Ha Park, Jae Hyun Lee, Jong Hoon Baek, Da Bok Jeong
  • Publication number: 20240321876
    Abstract: A semiconductor device including a substrate including first and second regions along a first direction, and a third region between the first region and the second region, an active pattern extending in the first direction, on the substrate, and first to third gate electrodes spaced apart from each other and extending in a second direction, on the active pattern, the active pattern of the first region including first semiconductor patterns spaced apart from each other and penetrating the first gate electrode, the active pattern of the second region including second semiconductor patterns spaced apart from each other and penetrating the second gate electrode, the active pattern of the third region including a transition pattern protruding from the substrate and intersecting the third gate electrode and including a sacrificial pattern and a third semiconductor pattern alternately stacked on the third region and including different materials from each other.
    Type: Application
    Filed: June 7, 2024
    Publication date: September 26, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Seong-Ho SONG, Jong Han LEE, Jong Ha PARK, Jae Hyun LEE, Jong Hoon BAEK, Da Bok JEONG
  • Patent number: 12040324
    Abstract: A semiconductor device including a substrate including first and second regions along a first direction, and a third region between the first region and the second region, an active pattern extending in the first direction, on the substrate, and first to third gate electrodes spaced apart from each other and extending in a second direction, on the active pattern, the active pattern of the first region including first semiconductor patterns spaced apart from each other and penetrating the first gate electrode, the active pattern of the second region including second semiconductor patterns spaced apart from each other and penetrating the second gate electrode, the active pattern of the third region including a transition pattern protruding from the substrate and intersecting the third gate electrode and including a sacrificial pattern and a third semiconductor pattern alternately stacked on the third region and including different materials from each other.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: July 16, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seong-Ho Song, Jong Han Lee, Jong Ha Park, Jae Hyun Lee, Jong Hoon Baek, Da Bok Jeong
  • Patent number: 11388859
    Abstract: The present invention relates to an auxiliary wheel for a lawn mower which includes an installation unit coupled to a main body of a lawn mower, a swing unit coupled to the installation unit to be swingable in one direction or the other direction, a wheel unit connected to the swing unit to be swingable with the swing unit, and a fixing unit installed on an outer portion of the installation unit and configured to fix the swing unit to be swingable in the other direction. When the wheel unit swings in the one direction, the main body is pressed against the ground, and when the wheel unit swings in the other direction, the main body is spaced apart from the ground.
    Type: Grant
    Filed: January 2, 2020
    Date of Patent: July 19, 2022
    Assignee: LS MTRON LTD.
    Inventors: Jung Sik Ki, Jae Seop Park, Gi Myeong Park, Dong Joo Kim, Jong Han Lee
  • Publication number: 20220059530
    Abstract: A semiconductor device including a substrate including first and second regions along a first direction, and a third region between the first region and the second region, an active pattern extending in the first direction, on the substrate, and first to third gate electrodes spaced apart from each other and extending in a second direction, on the active pattern, the active pattern of the first region including first semiconductor patterns spaced apart from each other and penetrating the first gate electrode, the active pattern of the second region including second semiconductor patterns spaced apart from each other and penetrating the second gate electrode, the active pattern of the third region including a transition pattern protruding from the substrate and intersecting the third gate electrode and including a sacrificial pattern and a third semiconductor pattern alternately stacked on the third region and including different materials from each other.
    Type: Application
    Filed: August 18, 2021
    Publication date: February 24, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Seong-Ho SONG, Jong Han LEE, Jong Ha PARK, Jae Hyun LEE, Jong Hoon BAEK, Da Bok JEONG
  • Publication number: 20200214211
    Abstract: The present invention relates to an auxiliary wheel for a lawn mower which includes an installation unit coupled to a main body of a lawn mower, a swing unit coupled to the installation unit to be swingable in one direction or the other direction, a wheel unit connected to the swing unit to be swingable with the swing unit, and a fixing unit installed on an outer portion of the installation unit and configured to fix the swing unit to be swingable in the other direction. When the wheel unit swings in the one direction, the main body is pressed against the ground, and when the wheel unit swings in the other direction, the main body is spaced apart from the ground.
    Type: Application
    Filed: January 2, 2020
    Publication date: July 9, 2020
    Inventors: Jung Sik KI, Jae Seop PARK, Gi Myeong PARK, Dong Joo KIM, Jong Han LEE
  • Patent number: 10636886
    Abstract: A semiconductor device includes a first fin type pattern and a second fin type pattern, which are isolated from each other by an isolating trench, and extend in a first direction on a substrate, respectively, a third fin type pattern which is spaced apart from the first fin type pattern and the second fin type pattern in a second direction and extends in the first direction, a field insulation film on a part of sidewalls of the first to third fin type patterns, a device isolation structure, which extends in the second direction, and is in the isolating trench, a gate insulation support, which extends in the first direction on the field insulation film between the first fin type pattern and the third fin type pattern, a gate structure, which intersects the third fin type pattern, extends in the second direction, and is in contact with the gate insulation support, wherein a height from the substrate to a bottom surface of the gate structure is greater than a height from the substrate to a bottom surface of the
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: April 28, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min Seok Jo, Jae Hyun Lee, Jong Han Lee, Hong Bae Park
  • Publication number: 20190305099
    Abstract: A semiconductor device includes a first fin type pattern and a second fin type pattern, which are isolated from each other by an isolating trench, and extend in a first direction on a substrate, respectively, a third fin type pattern which is spaced apart from the first fin type pattern and the second fin type pattern in a second direction and extends in the first direction, a field insulation film on a part of sidewalls of the first to third fin type patterns, a device isolation structure, which extends in the second direction, and is in the isolating trench, a gate insulation support, which extends in the first direction on the field insulation film between the first fin type pattern and the third fin type pattern, a gate structure, which intersects the third fin type pattern, extends in the second direction, and is in contact with the gate insulation support, wherein a height from the substrate to a bottom surface of the gate structure is greater than a height from the substrate to a bottom surface of the
    Type: Application
    Filed: November 1, 2018
    Publication date: October 3, 2019
    Inventors: Min Seok JO, Jae Hyun LEE, Jong Han LEE, Hong Bae PARK
  • Patent number: 8355468
    Abstract: A carrier frequency estimation method and apparatus is provided for improving frequency estimation performance in an Orthogonal Frequency Division Multiplexing (OFDM) communication system. The frequency estimation method for a wireless communication system includes summing correlations of four pairs of reference symbols transmitted at different frequency-time resource blocks in a pattern, each pair including two closest reference symbols; calculating a statistical value (E) by accumulating the summed correlation in a frequency direction; and estimating a frequency offset using an angle extracted from the statistical value (E).
    Type: Grant
    Filed: November 27, 2009
    Date of Patent: January 15, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hee Jin Ro, Jong Han Lee
  • Patent number: 7415067
    Abstract: An FDTS/DF equalizer using absolute value calculation includes: a feed-forward filter receiving and filtering a sampled signal; a feed-back filter filtering a restored data; a subtractor obtaining a difference between signals respectively filtered by the feed-forward filter and the feed-back filter; and a detector receiving the subtracted signal and detecting a data using absolute value calculation. The FDTS/DF equalizer in the reproducing terminal which reproduces a data passing through a channel performs an absolute value operation by using the adder, so that the number of gates can be reduced, the calculation speed can be improved, and the size of a chip can be reduced.
    Type: Grant
    Filed: January 23, 2002
    Date of Patent: August 19, 2008
    Assignee: LG Electronics Inc.
    Inventor: Jong Han Lee
  • Publication number: 20020146070
    Abstract: An FDTS/DF equalizer using absolute value calculation includes: a feed-forward filter receiving and filtering a sampled signal; a feed-back filter filtering a restored data; a subtractor obtaining a difference between signals respectively filtered by the feed-forward filter and the feed-back filter; and a detector receiving the subtracted signal and detecting a data using absolute value calculation. The FDTS/DF equalizer in the reproducing terminal which reproduces a data passing through a channel performs an absolute value operation by using the adder, so that the number of gates can be reduced, the calculation speed can be improved, and the size of a chip can be reduced.
    Type: Application
    Filed: January 23, 2002
    Publication date: October 10, 2002
    Inventor: Jong Han Lee