Patents by Inventor Jong Ho Na

Jong Ho Na has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12538615
    Abstract: In embodiments a component includes a semiconductor layer sequence having a p-side semiconductor layer, an n-side semiconductor layer and an active zone located therebetween, wherein the active zone has a multiple quantum well structure including a plurality of quantum barrier layers and quantum well layers, the quantum barrier layers and the quantum well layers being arranged alternately along a vertical direction, wherein the active zone has at least one recess having facets extending obliquely to a main surface of the active zone, the recess being opened towards the p-side semiconductor layer, wherein, at least within the recess, the quantum barrier layers are n-doped and have a non-constant doping profile so that the component is configured to increase transport negatively charged charge carriers, from the n-side semiconductor layer towards the p-side semiconductor layer, based on the non-constant doping profile, and wherein, from the n-side semiconductor layer towards the p-side semiconductor layer, dopa
    Type: Grant
    Filed: February 17, 2021
    Date of Patent: January 27, 2026
    Assignee: ams-OSRAM International GmbH
    Inventors: Xiaojun Chen, Heng Wang, Jong Ho Na, Alvaro Gomez-Iglesias
  • Patent number: 12324274
    Abstract: In an embodiment an optoelectronic semiconductor chip includes a semiconductor layer sequence including a first semiconductor region of a first conductivity type, an active zone having a multiple quantum well structure composed of a plurality of quantum well layers and barrier layers, a second semiconductor region of a second conductivity type and a plurality of channels extending through the active zone, wherein the second semiconductor region is located in the channels and is configured for lateral current injection into the active zone, wherein the channels have a first aperture half-angle in the first semiconductor region and a second aperture half-angle in the active zone, and wherein the second aperture half-angle is greater than zero and less than the first aperture half-angle.
    Type: Grant
    Filed: October 6, 2020
    Date of Patent: June 3, 2025
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Xiaojun Chen, Heng Wang, Jong Ho Na, Alvaro Gomez-Iglesias, Jürgen Off, Philipp Drechsel, Thomas Lehnhardt
  • Publication number: 20240120443
    Abstract: In embodiments a component includes a semiconductor layer sequence having a p-side semiconductor layer, an n-side semiconductor layer and an active zone located therebetween, wherein the active zone has a multiple quantum well structure including a plurality of quantum barrier layers and quantum well layers, the quantum barrier layers and the quantum well layers being arranged alternately along a vertical direction, wherein the active zone has at least one recess having facets extending obliquely to a main surface of the active zone, the recess being opened towards the p-side semiconductor layer, wherein, at least within the recess, the quantum barrier layers are n-doped and have a non-constant doping profile so that the component is configured to increase transport negatively charged charge carriers, from the n-side semiconductor layer towards the p-side semiconductor layer, based on the non-constant doping profile, and wherein, from the n-side semiconductor layer towards the p-side semiconductor layer, dopa
    Type: Application
    Filed: February 17, 2021
    Publication date: April 11, 2024
    Inventors: Xiaojun Chen, Heng Wang, Jong Ho Na, Alvaro Gomez-lglesias
  • Publication number: 20220393062
    Abstract: In an embodiment an optoelectronic semiconductor chip includes a semiconductor layer sequence including a first semiconductor region of a first conductivity type, an active zone having a multiple quantum well structure composed of a plurality of quantum well layers and barrier layers, a second semiconductor region of a second conductivity type and a plurality of channels extending through the active zone, wherein the second semiconductor region is located in the channels and is configured for lateral current injection into the active zone, wherein the channels have a first aperture half-angle in the first semiconductor region and a second aperture half-angle in the active zone, and wherein the second aperture half-angle is greater than zero and less than the first aperture half-angle.
    Type: Application
    Filed: October 6, 2020
    Publication date: December 8, 2022
    Applicants: OSRAM Opto Semiconductors GmbH, OSRAM Opto Semiconductors GmbH
    Inventors: Xiaojun Chen, Heng Wang, Jong Ho Na, Alvaro Gomez-Iglesias, Jürgen Off, Philipp Drechsel, Thomas Lehnhardt
  • Patent number: 10971649
    Abstract: An embodiment relates to a semiconductor device and a light emitting device package including the same. The semiconductor device according to the embodiment may include: a first semiconductor layer; a second semiconductor layer disposed on the first semiconductor layer and including V-pits; an active layer disposed on the second semiconductor layer; a third semiconductor layer having a bandgap wider than that of the active layer on the active layer; a fourth semiconductor layer having a band gap narrower than that of third semiconductor layer on the third semiconductor layer; and a fifth semiconductor layer having a bandgap wider than that of the fourth semiconductor layer on the fourth semiconductor layer, wherein the third semiconductor layer and the fifth semiconductor layer include an aluminum composition, and the fifth semiconductor layer has a bandgap equal to or wider than that of the third semiconductor layer.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: April 6, 2021
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Jong Ho Na, Oh Min Kwon, June O Song, Jeong Tak Oh
  • Publication number: 20190348567
    Abstract: An embodiment relates to a semiconductor device and a light emitting device package including the same. The semiconductor device according to the embodiment may include: a first semiconductor layer; a second semiconductor layer disposed on the first semiconductor layer and including V-pits; an active layer disposed on the second semiconductor layer; a third semiconductor layer having a bandgap wider than that of the active layer on the active layer; a fourth semiconductor layer having a band gap narrower than that of third semiconductor layer on the third semiconductor layer; and a fifth semiconductor layer having a bandgap wider than that of the fourth semiconductor layer on the fourth semiconductor layer, wherein the third semiconductor layer and the fifth semiconductor layer include an aluminum composition, and the fifth semiconductor layer has a bandgap equal to or wider than that of the third semiconductor layer.
    Type: Application
    Filed: January 4, 2018
    Publication date: November 14, 2019
    Inventors: Jong Ho NA, Oh Min KWON, June O SONG, Jeong Tak OH
  • Patent number: 10446715
    Abstract: Disclosed herein is a semiconductor device. The semiconductor device includes a substrate, a first conductive type semiconductor layer disposed over the substrate, an active layer disposed over the first conductive type semiconductor layer, and a second conductive type semiconductor layer disposed over the active layer. The first conductive type semiconductor layer includes a first layer, a second layer and a third layer having different composition ratios of indium (In). The first semiconductor layer is disposed close to the active layer. The second semiconductor layer is disposed under the first semiconductor layer. The third semiconductor layer is disposed under the second semiconductor layer. In content is reduced from the active layer to the third semiconductor layer, and In content of the third semiconductor layer may be 5% or more to 10% or less of that of the active layer.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: October 15, 2019
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Kwang Sun Baek, Jong Ho Na, Dae Seob Han, Jung Hyun Hwang
  • Publication number: 20190259913
    Abstract: Disclosed herein is a semiconductor device. The semiconductor device includes a substrate, a first conductive type semiconductor layer disposed over the substrate, an active layer disposed over the first conductive type semiconductor layer, and a second conductive type semiconductor layer disposed over the active layer. The first conductive type semiconductor layer includes a first layer, a second layer and a third layer having different composition ratios of indium (In). The first semiconductor layer is disposed close to the active layer. The second semiconductor layer is disposed under the first semiconductor layer. The third semiconductor layer is disposed under the second semiconductor layer. In content is reduced from the active layer to the third semiconductor layer, and In content of the third semiconductor layer may be 5% or more to 10% or less of that of the active layer.
    Type: Application
    Filed: November 2, 2017
    Publication date: August 22, 2019
    Applicant: LG INNOTEK CO., LTD.
    Inventors: Kwang Sun BAEK, Jong Ho NA, Dae Seob HAN, Jung Hyun HWANG
  • Patent number: 9029875
    Abstract: Disclosed are a light emitting device, a method for manufacturing the same, a light emitting device package, and a lighting system. The light emitting device includes a first conductive semiconductor layer, an active layer comprising a well layer and a barrier layer on the first conductive layer, and a second conductive semiconductor layer on the active layer. The well layer includes a first well layer closest to the first conductive semiconductor layer and having a first energy bandgap, a third well layer closest to the second conductive semiconductor layer and having a third energy bandgap, and a second well layer interposed between the first and third well layers and having a second energy bandgap. The third energy bandgap of the third well layer is greater than the second energy bandgap of the second well layer.
    Type: Grant
    Filed: March 26, 2012
    Date of Patent: May 12, 2015
    Assignee: LG Innotek Co., Ltd.
    Inventors: Jong Ho Na, Se Hwan Sim, Chong Cook Kim, Jae In Yoon, Jong Pil Jeong, Jung Hyun Hwang, Dong Han Yoo
  • Patent number: 8748865
    Abstract: Disclosed are a light emitting device, a method of manufacturing the light emitting device, a light emitting device package and a lighting system. The light emitting device includes a first conductive semiconductor layer; an active layer including a quantum well and a quantum barrier and disposed on the first conductive semiconductor layer; and a second conductive semiconductor layer on the active layer. The active layer includes a first quantum well adjacent to the second conductive semiconductor layer, a second quantum well adjacent to the first quantum well, and a first quantum barrier between the first quantum well and the second quantum well. A recombination rate of electron-hole in the second quantum well is higher than the recombination rate of the electron-hole in the first quantum well, and the first quantum well has an energy level higher than the energy level of the second quantum well.
    Type: Grant
    Filed: August 14, 2012
    Date of Patent: June 10, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Jong Hak Won, Jong Ho Na, Jae In Yoon, Hoon ki Hong, Se Hwan Sim
  • Publication number: 20140124810
    Abstract: A light emitting device includes a substrate and a plurality of protrusions protruding from a top surface of the substrate. A first semiconductor layer is provided on top surfaces of the protrusions and a plurality of seed patterns protrudes from a bottom surface of the first semiconductor layer toward the protrusions. A medium layer is provided between the protrusions and a light emitting structure on a top surface of the first semiconductor layer. The bottom surface of the first semiconductor layer is located at a higher position than that of each of the protrusions, and the first semiconductor layer contacts a c-plane of each protrusion.
    Type: Application
    Filed: October 31, 2013
    Publication date: May 8, 2014
    Inventors: Sang Il Kim, Dong Hun Kang, Jong Ho Na, Yong Seon Song
  • Publication number: 20130048944
    Abstract: Disclosed are a light emitting device, a method of manufacturing the light emitting device, a light emitting device package and a lighting system. The light emitting device includes a first conductive semiconductor layer; an active layer including a quantum well and a quantum barrier and disposed on the first conductive semiconductor layer; and a second conductive semiconductor layer on the active layer. The active layer includes a first quantum well adjacent to the second conductive semiconductor layer, a second quantum well adjacent to the first quantum well, and a first quantum barrier between the first quantum well and the second quantum well. A recombination rate of electron-hole in the second quantum well is higher than the recombination rate of the electron-hole in the first quantum well, and the first quantum well has an energy level higher than the energy level of the second quantum well.
    Type: Application
    Filed: August 14, 2012
    Publication date: February 28, 2013
    Inventors: Jong Hak WON, Jong Ho Na, Jae In Yoon, Hoon Ki Hong, Se Hwan Sim
  • Publication number: 20120241770
    Abstract: Disclosed are a light emitting device, a method for manufacturing the same, a light emitting device package, and a lighting system. The light emitting device includes a first conductive semiconductor layer, an active layer comprising a well layer and a barrier layer on the first conductive layer, and a second conductive semiconductor layer on the active layer. The well layer includes a first well layer closest to the first conductive semiconductor layer and having a first energy bandgap, a third well layer closest to the second conductive semiconductor layer and having a third energy bandgap, and a second well layer interposed between the first and third well layers and having a second energy bandgap. The third energy bandgap of the third well layer is greater than the second energy bandgap of the second well layer.
    Type: Application
    Filed: March 26, 2012
    Publication date: September 27, 2012
    Inventors: Jong Ho NA, Se Hwan Sim, Chong Cook Kim, Jae In Yoon, Jong Pil Jeong, Jung Hyun Hwang, Dong Han Yoo
  • Patent number: 8202753
    Abstract: A light emitting diode (LED) having a vertical structure and a method for fabricating the same. The light emitting diode (LED) having a vertical structure includes a support layer; a first electrode formed on the support layer; a plurality of semiconductor layers formed on the first electrode; a conductive semiconductor layer formed on the plurality of semiconductor layers, and provided with an outer surface having a tilt angle of a designated degree; and a second electrode formed on the conductive semiconductor layer.
    Type: Grant
    Filed: September 8, 2010
    Date of Patent: June 19, 2012
    Assignee: LG Electronics Inc.
    Inventors: Jong Wook Kim, Jae Wan Choi, Hyun Kyong Cho, Jong Ho Na, Jun Ho Jang
  • Publication number: 20110059564
    Abstract: A light emitting diode (LED) having a vertical structure and a method for fabricating the same. The light emitting diode (LED) having a vertical structure includes a support layer; a first electrode formed on the support layer; a plurality of semiconductor layers formed on the first electrode; a conductive semiconductor layer formed on the plurality of semiconductor layers, and provided with an outer surface having a tilt angle of a designated degree; and a second electrode formed on the conductive semiconductor layer.
    Type: Application
    Filed: September 8, 2010
    Publication date: March 10, 2011
    Inventors: Jong Wook KIM, Jae Wan CHOI, Hyun Kyong CHO, Jong Ho NA, Jun Ho JANG
  • Patent number: 7812357
    Abstract: A light emitting diode (LED) having a vertical structure and a method for fabricating the same. The light emitting diode (LED) having a vertical structure includes a support layer; a first electrode formed on the support layer; a plurality of semiconductor layers formed on the first electrode; a conductive semiconductor layer formed on the plurality of semiconductor layer and provided with an outer surface having a tilt angle of a designated degree; and a second electrode formed on the conductive semiconductor layer.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: October 12, 2010
    Assignees: LG Electronics Inc., LG Innotek Co., Ltd.
    Inventors: Jong Wook Kim, Jae Wan Choi, Hyun Kyong Cho, Jong Ho Na, Jun Ho Jang
  • Publication number: 20070164298
    Abstract: A light emitting diode (LED) having a vertical structure and a method for fabricating the same. The light emitting diode (LED) having a vertical structure includes a support layer; a first electrode formed on the support layer; a plurality of semiconductor layers formed on the first electrode; a conductive semiconductor layer formed on the plurality of semiconductor layer and provided with an outer surface having a tilt angel of a designated degree; and a second electrode formed on the conductive semiconductor layer.
    Type: Application
    Filed: December 15, 2006
    Publication date: July 19, 2007
    Applicants: LG ELECTRONICS INC., LG INNOTEK CO., LTD.
    Inventors: Jong Wook Kim, Jae Wan Choi, Hyun Kyong Cho, Jong Ho Na, Jun Jang