Patents by Inventor Jong-Ho WOO

Jong-Ho WOO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11957669
    Abstract: One aspect of the present disclosure is a pharmaceutical composition which includes (R)—N-[1-(3,5-difluoro-4-methansulfonylamino-phenyl)-ethyl]-3-(2-propyl-6-trifluoromethyl-pyridin-3-yl)-acrylamide as a first component and a cellulosic polymer as a second component, wherein the composition of one aspect of the present disclosure has a formulation characteristic in which crystal formation is delayed for a long time.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: April 16, 2024
    Assignee: AMOREPACIFIC CORPORATION
    Inventors: Joon Ho Choi, Won Kyung Cho, Kwang-Hyun Shin, Byoung Young Woo, Ki-Wha Lee, Min-Soo Kim, Jong Hwa Roh, Mi Young Park, Young-Ho Park, Eun Sil Park, Jae Hong Park
  • Publication number: 20240081079
    Abstract: Provided is a semiconductor device. The semiconductor device includes a substrate; a first interlayer insulating layer, on the substrate, comprising a first interconnection; a common source plate on the first interlayer insulating layer; a conductive layer extending in a first direction on the common source plate; a ferroelectric layer on one sidewall of the conductive layer; a channel layer on the ferroelectric layer; a first conductive pillar, on the channel layer, penetrating the common source plate and being connected to the first interconnection; and a second conductive pillar, on the channel layer, spaced apart from the first conductive pillar in the first direction and connected to the common source plate, the ferroelectric layer and the channel layer between the common source plate and the first conductive pillar.
    Type: Application
    Filed: June 26, 2023
    Publication date: March 7, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Young Ji NOH, Jong Ho WOO, Min Jun LEE
  • Publication number: 20240015977
    Abstract: A non-volatile memory device includes a substrate; an insulating layer on the substrate; a bit line isolation layer on the insulating layer; a common source line conductive layer on the bit line isolation layer; a ferroelectric memory cell on the bit line isolation layer; a bit line connected to a top of the ferroelectric memory cell; and a common source line connected to the common source line conductive layer and electrically connected to the ferroelectric memory cell, wherein the ferroelectric memory cell includes a ferroelectric layer, a channel layer, a first conductive filler connected to the ferroelectric layer and the channel layer and extending in a vertical direction, and a second conductive filler connected to the ferroelectric layer and the channel layer and extending in the vertical direction, the first conductive filler is connected to the bit line, and the second conductive filler is connected to the common source line.
    Type: Application
    Filed: July 3, 2023
    Publication date: January 11, 2024
    Inventors: Min Jun LEE, Jong Ho WOO, Yong Seok KIM
  • Patent number: 10515819
    Abstract: A semiconductor device includes a substrate having a first region and a second region, the first region including memory cells, and the second region including transistors for driving the memory cells, and device isolation regions disposed within the substrate to define active regions of the substrate. The active regions include a first guard active region surrounding the first region, a second guard active region surrounding a portion of the second region, and at least one dummy active region disposed between the first guard active region and the second guard active region.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: December 24, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ji Hoon Park, Joong Shik Shin, Byoung Il Lee, Jong Ho Woo, Eun Taek Jung, Jun Ho Cha
  • Publication number: 20190013206
    Abstract: A semiconductor device includes a substrate having a first region and a second region, the first region including memory cells, and the second region including transistors for driving the memory cells, and device isolation regions disposed within the substrate to define active regions of the substrate. The active regions include a first guard active region surrounding the first region, a second guard active region surrounding a portion of the second region, and at least one dummy active region disposed between the first guard active region and the second guard active region.
    Type: Application
    Filed: December 18, 2017
    Publication date: January 10, 2019
    Inventors: Ji Hoon PARK, Joong Shik SHIN, BYOUNG IL LEE, Jong Ho WOO, Eun Taek JUNG, Jun Ho CHA
  • Publication number: 20170373504
    Abstract: Disclosed herein are a system and method for efficient regulation of electric power of a gas refill center capable of enabling efficient operation of a natural gas generator and electric power storage means provided to the gas refill center while reducing electric utility charges by reducing the power consumption amount and the peak electric power produced by operation of a compressor of a high load device using the natural gas generator and the power storage means.
    Type: Application
    Filed: December 6, 2016
    Publication date: December 28, 2017
    Applicant: ECOPLUS CO.,LTD.
    Inventors: Jong-Ho WOO, Ho-Seok CHOI