Patents by Inventor Jong-Hong Lu

Jong-Hong Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6822258
    Abstract: A self-organized nanometer interface structure is disclosed. During the reactive sputtering process, the chemical dynamics difference among reactants induces self-organization to form a special nanometer interface structure. The nanometer interface structure naturally form an interface potential difference so that it has a rectifying effect in a particular range of potential variation range. Therefore, it functions like a diode. Such a self-organized nanometer interface structure can be used in the manufacturing of diodes, transistors, light-emitting devices, and sonic devices. The invention has the advantages of a wide variety of material selections, highly compatible processes, easy operations, and low-cost fabrications.
    Type: Grant
    Filed: March 4, 2003
    Date of Patent: November 23, 2004
    Assignee: Industrial Technology Research Institute/Material Research
    Inventors: Jong-Hong Lu, Huai-Luh Chang, Chiung-Hsiung Chen, Yi-Ping Huang, Sheng-Ju Liao, Yuh-Fwu Chou, Ho-Yin Pun
  • Publication number: 20040119062
    Abstract: A self-organized nanometer interface structure is disclosed. During the reactive sputtering process, the chemical dynamics difference among reactants induces self-organization to form a special nanometer interface structure. The nanometer interface structure naturally form an interface potential difference so that it has a rectifying effect in a particular range of potential variation range. Therefore, it functions like a diode. Such a self-organized nanometer interface structure can be used in the manufacturing of diodes, transistors, light-emitting devices, and sonic devices. The invention has the advantages of a wide variety of material selections, highly compatible processes, easy operations, and low-cost fabrications.
    Type: Application
    Filed: March 4, 2003
    Publication date: June 24, 2004
    Inventors: Jong-Hong Lu, Huai-Luh Chang, Chiung-Hsiung Chen, Yi-Ping Huang, Sheng-Ju Liao, Yuh-Fwu Chou, Ho-Yin Pun
  • Publication number: 20040092050
    Abstract: A method of implanting metallic nanowires or nanotube upon substrate with assistance of an electric field is proposed. The resulting structure having implanted and/or oriented nanowires or nanotubes has excellent electron emission behavior, and thus can be used as the electron field emission source in the application of a field emission display or lighting products.
    Type: Application
    Filed: December 30, 2002
    Publication date: May 13, 2004
    Applicant: Industrial Technology Research Institute
    Inventors: Geoffrey Shuy, Jong-Hong Lu, Yu-Wei Chou, Kuokuang Yeh, Chung-Ho Tai, Chih-Ming Chang
  • Patent number: 6667072
    Abstract: This invention provides a concept of using porous materials on ceramic substrate planarization. This planarized substrate consists of a ceramic substrate, a buffer layer, and a nanostructure layer. The ceramic substrate provides structural strength and surface-mount capability. The buffer layer provides the adhesion between the substrate and the nanostructure layer. The nanostructure layer provides the required surface smoothness of the ceramic substrates for performing thin-film processing techniques and enhances adhesion for metallization and electronic materials.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: December 23, 2003
    Assignee: Industrial Technology Research Institute
    Inventors: Geoffrey Wen-Tai Shuy, Jong-Hong Lu, Sheng-Ju Liao, Huai-Luh Chang, Song-Wein Hong, Ruey-Cheng Huang
  • Publication number: 20030118738
    Abstract: This invention provides a concept of using porous materials on ceramic substrate planarization. This planarized substrate comprises a ceramic substrate, a buffer layer, and a nanostructure layer. The ceramic substrate can enhance the structural strength and surface-mount capability. The buffer layer provides the adhesion between a substrate and a nanostructure layer. Nanostructure layer provides the required surface smoothness of the ceramic substrates for performing thin-film processing techniques and enhancing adhesion for metallization and electronic materials. This layer also provides required properties for integrating electronic such as thermal conductivity, electrical insulation, dielectric, etc.
    Type: Application
    Filed: December 21, 2001
    Publication date: June 26, 2003
    Inventors: Geoffrey Wen-Tai Shuy, Jong-Hong Lu, Sheng-Ju Liao, Huai-Luh Chang, Song-Wein Hong, Ruey-Cheng Huang