Patents by Inventor Jong-hoon Kang

Jong-hoon Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12249379
    Abstract: Open block-based read offset compensation in read operation of memory device is disclosed. For example, a memory device includes an array of memory cells arranged in a plurality of blocks and a peripheral circuit coupled to the array of memory cells. The peripheral circuit is configured to determine that a block of the blocks is an open block based on an open block information, and in response to the block of the blocks being an open block, perform a read operation on a memory cell of the array of memory cells in the block using a compensated read voltage. The compensated read voltage has an offset from a default read voltage of the block.
    Type: Grant
    Filed: November 7, 2023
    Date of Patent: March 11, 2025
    Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventors: Xiaojiang Guo, Jong Hoon Kang, Youxin He
  • Publication number: 20240071512
    Abstract: Open block-based read offset compensation in read operation of memory device is disclosed. For example, a memory device includes an array of memory cells arranged in a plurality of blocks and a peripheral circuit coupled to the array of memory cells. The peripheral circuit is configured to determine that a block of the blocks is an open block based on an open block information, and in response to the block of the blocks being an open block, perform a read operation on a memory cell of the array of memory cells in the block using a compensated read voltage. The compensated read voltage has an offset from a default read voltage of the block.
    Type: Application
    Filed: November 7, 2023
    Publication date: February 29, 2024
    Inventors: Xiaojiang Guo, Jong Hoon Kang, Youxin He
  • Patent number: 11862250
    Abstract: Open block-based read offset compensation in read operation of memory device is disclosed. For example, a memory device includes an array of memory cells arranged in a plurality of blocks and a peripheral circuit coupled to the array of memory cells. The peripheral circuit is configured to, in response to a block of the plurality of blocks being an open block, perform a read operation on a memory cell of the array of memory cells in the block using a compensated read voltage. The compensated read voltage has an offset from a default read voltage of the block.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: January 2, 2024
    Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventors: Xiaojiang Guo, Jong Hoon Kang, Youxin He
  • Publication number: 20220293187
    Abstract: Open block-based read offset compensation in read operation of memory device is disclosed. For example, a memory device includes an array of memory cells arranged in a plurality of blocks and a peripheral circuit coupled to the array of memory cells. The peripheral circuit is configured to, in response to a block of the plurality of blocks being an open block, perform a read operation on a memory cell of the array of memory cells in the block using a compensated read voltage. The compensated read voltage has an offset from a default read voltage of the block.
    Type: Application
    Filed: August 27, 2021
    Publication date: September 15, 2022
    Inventors: Xiaojiang GUO, Jong Hoon Kang, Youxin He
  • Publication number: 20210299724
    Abstract: A cooling apparatus according to an embodiment of the present invention may comprise: a chamber member to which a cooling fluid is supplied from the outside; a discharge member, provided in the chamber member, for discharging the cooling fluid inside the chamber unit; and a resistance member, provided in an inlet portion of the chamber member, for inhibiting an initial flow of the cooling fluid supplied into the chamber member.
    Type: Application
    Filed: April 4, 2017
    Publication date: September 30, 2021
    Inventors: Jong-Hoon Kang, Gwan-Sik Min, Hui-Seop KWON
  • Patent number: 10994316
    Abstract: A straightening system is provided to perform straightening in conformity with a shape pattern of a the material. The straightening system includes a cooling device configured to spray a cooling fluid in a predetermined pattern with respect to a plurality of regions of the material, divided in a width direction, to cool the material that is heated in a heating furnace and then passes through a rolling mill. The straightening system also includes a straightening device configured to straighten the material passed through the cooling device. The straightening system further includes a flatness measuring system configured to measure flatness of the material passed through the cooling device and a controller configured to receive data of the flatness of the material from the flatness measuring system and to control the cooling device in response to the data to enhance the flatness of the material.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: May 4, 2021
    Assignee: POSCO
    Inventors: Gwan-Sik Min, Pil-Jong Lee, Seong-Hyun Ko, Hui-Seop Kwon, Seung-Woo Park, Jong-Hoon Kang, Jae-Hyung Seo
  • Patent number: 10967410
    Abstract: The present invention relates to a cooling device and a cooling method capable of controlling, by section, the flow of coolant supplied in a widthwise direction, the cooling device comprising: a base frame connected to an external cooling fluid supply line, and disposed to be able to spray coolant onto a material that passes through a rolling mill after having been heated in a heating furnace; and a nozzle assembly disposed on the base frame, and spraying a cooling fluid in an arbitrary pattern onto a plurality of sections divided along the widthwise direction of the material to minimize a deviation in temperature in the widthwise direction of the material. Through this configuration, the flow of coolant supplied in the widthwise direction of a material can be controlled to be varied, thereby being capable of minimizing a deviation in temperature in the widthwise direction of a high temperature material.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: April 6, 2021
    Assignee: POSCO
    Inventors: Pil-Jong Lee, Jong-Hoon Kang, Hui-Seop Kwon, Gwan-Sik Min
  • Publication number: 20200080168
    Abstract: A cooling system according to an embodiment of the present invention may comprise: a cooling part which supplies a cooling fluid to a strip; and a boiling film removal part, which physically comes into contact with the strip and removes a boiling film formed by the cooling fluid. The boiling film removal part according to the embodiment may be disposed at a position where a nuclear boiling and a film boiling are mixed together along a widthwise direction of the strip.
    Type: Application
    Filed: December 15, 2017
    Publication date: March 12, 2020
    Inventors: Pil-Jong Lee, Jae-Jyung Seo, Seong-Hyun Ko, Jong-Hoon Kang, Gwan-Sik Min
  • Publication number: 20190001385
    Abstract: The present invention relates to a cooling device and a cooling method capable of controlling, by section, the flow of coolant supplied in a widthwise direction, the cooling device comprising: a base frame connected to an external cooling fluid supply line, and disposed to be able to spray coolant onto a material that passes through a rolling mill after having been heated in a heating furnace; and a nozzle assembly disposed on the base frame, and spraying a cooling fluid in an arbitrary pattern onto a plurality of sections divided along the widthwise direction of the material to minimize a deviation in temperature in the widthwise direction of the material. Through this configuration, the flow of coolant supplied in the widthwise direction of a material can be controlled to be varied, thereby being capable of minimizing a deviation in temperature in the widthwise direction of a high temperature material.
    Type: Application
    Filed: July 27, 2016
    Publication date: January 3, 2019
    Applicant: POSCO
    Inventors: Pil-Jong LEE, Jong-Hoon KANG, Hui-Seop KWON, Gwan-Sik MIN
  • Publication number: 20180369887
    Abstract: A straightening system and a straightening method are provided to perform straightening in conformity with the shape pattern of a material, the straightening system comprising: a cooling device configured to spray a cooling fluid in a predetermined pattern with respect to a plurality of regions of a material, divided in a width direction, to cool the material that is heated in a heating furnace and then passes through a rolling mill; a straightening device configured to straighten the material passed through the cooling device; a flatness measuring system configured to measure flatness of the material passed through the cooling device; and a controller configured to receive data of the flatness of the material from the flatness measuring system and to control the cooling device in response to the data to enhance the flatness of the material.
    Type: Application
    Filed: July 27, 2016
    Publication date: December 27, 2018
    Inventors: Gwan-Sik MIN, Pil-Jong LEE, Seong-Hyun KO, Hui-Seop KWON, Seung-Woo PARK, Jong-Hoon KANG, Jae-Hyung SEO
  • Patent number: 9240357
    Abstract: According to example embodiments of inventive concepts, a method of fabricating a semiconductor device includes: forming a preliminary stack structure, the preliminary stack structure defining a through hole; forming a protection layer and a dielectric layer in the through hole; forming a channel pattern, a gapfill pattern, and a contact pattern in the through hole; forming an offset oxide on the preliminary stack structure; measuring thickness data of the offset oxide; and scanning the offset oxide using a reactive gas cluster ion beam. The scanning the offset oxide includes setting a scan speed based on the measured thickness data of the offset oxide, and forming a gas cluster.
    Type: Grant
    Filed: December 9, 2013
    Date of Patent: January 19, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae-Gon Kim, Jong-Hoon Kang, Jae-Young Ahn, Jun-Kyu Yang, Han-Mei Choi, Ki-Hyun Hwang
  • Patent number: 9236259
    Abstract: A method of manufacturing a semiconductor device having a doped layer may be provided. The method includes providing a substrate having a first region and a second region, forming a gate dielectric layer on the substrate, forming a first gate electrode layer on the gate dielectric layer, forming a first doped layer on the first gate electrode layer, forming a first capping layer on the first doped layer, forming a mask pattern on the first capping layer in the first region, the mask pattern exposing the first capping layer in the second region, removing the first capping layer and the first doped layer in the second region, removing the mask pattern, and forming a second doped layer on the first capping layer in the first region and the first gate electrode layer in the second region.
    Type: Grant
    Filed: May 13, 2014
    Date of Patent: January 12, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eun-Young Jo, Jong-Hoon Kang, Tae-Gon Kim, Han-Mei Choi
  • Patent number: 9190495
    Abstract: A recessed channel array transistor may include a substrate, a gate oxide layer, a gate electrode and source/drain regions. The substrate may have an active region and an isolation region. A recess may be formed in the active region. The gate oxide layer may be formed on the recess and the substrate. The gate oxide layer may include a first portion on an intersection between a side end of the recess and a sidewall of the active region and a second portion on a side surface of the recess. The first portion may include a thickness greater than about 70% of a thickness of the second portion. The gate electrode may be formed on the gate oxide layer. The source/drain regions may be formed in the substrate. Thus, the recessed channel array transistor may have a decreased leakage current and an increased on-current.
    Type: Grant
    Filed: September 21, 2009
    Date of Patent: November 17, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-Do Ryu, Dong-Chan Kim, Seong-Hoon Jeong, Si-Young Choi, Yu-Gyun Shin, Tai-Su Park, Jong-Ryeol Yoo, Jong-Hoon Kang
  • Publication number: 20140377926
    Abstract: A fin type active pattern is formed on a substrate. The fin type active pattern projects from the substrate. A diffusion film is formed on the fin type active pattern. The diffusion film includes an impurity. The impurity is diffused into a lower portion of the fin type active pattern to form a punch-through stopper diffusion layer.
    Type: Application
    Filed: June 3, 2014
    Publication date: December 25, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tae-Gon KIM, Jong-Hoon Kang, Eun-Young Jo, Gil-Heyun Choi, Han-Mei Choi
  • Publication number: 20140357071
    Abstract: A method of manufacturing a semiconductor device having a doped layer may be provided. The method includes providing a substrate having a first region and a second region, forming a gate dielectric layer on the substrate, forming a first gate electrode layer on the gate dielectric layer, forming a first doped layer on the first gate electrode layer, forming a first capping layer on the first doped layer, forming a mask pattern on the first capping layer in the first region, the mask pattern exposing the first capping layer in the second region, removing the first capping layer and the first doped layer in the second region, removing the mask pattern, and forming a second doped layer on the first capping layer in the first region and the first gate electrode layer in the second region.
    Type: Application
    Filed: May 13, 2014
    Publication date: December 4, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eun-Young JO, Jong-Hoon KANG, Tae-Gon KIM, Han-Mei CHOI
  • Patent number: 8883608
    Abstract: An alignment mark is formed on a substrate including a first region and a second region. The alignment mark is formed in the second region. An etch target layer including a crystalline material is formed on the alignment mark and the substrate. The etch target layer in the first region is partially amorphized. The amorphized etch target layer is etched to form an opening.
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: November 11, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Hoon Kang, Tae-Gon Kim, Han-Mei Choi, Eun-Young Jo
  • Publication number: 20140322832
    Abstract: According to example embodiments of inventive concepts, a method of fabricating a semiconductor device includes: forming a preliminary stack structure, the preliminary stack structure defining a through hole; forming a protection layer and a dielectric layer in the through hole; forming a channel pattern, a gapfill pattern, and a contact pattern in the through hole; forming an offset oxide on the preliminary stack structure; measuring thickness data of the offset oxide; and scanning the offset oxide using a reactive gas cluster ion beam. The scanning the offset oxide includes setting a scan speed based on the measured thickness data of the offset oxide, and forming a gas cluster.
    Type: Application
    Filed: December 9, 2013
    Publication date: October 30, 2014
    Inventors: Tae-Gon KIM, Jong-Hoon KANG, Jae-Young AHN, Jun-Kyu YANG, Han-Mei CHOI, Ki-Hyun HWANG
  • Patent number: 8854614
    Abstract: A method of thermally treating a wafer includes loading a wafer into a process chamber having one or more regions of uniform temperature gradient and one or more regions of non-uniform temperature gradient. A defect is detected in the wafer. The wafer is aligned to position the defect within one of the one or more regions of uniform temperature gradient. A rapid thermal process is performed on the wafer in the process chamber while the defect is positioned within one of the one or more regions of uniform temperature gradient.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: October 7, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Hoon Kang, Taegon Kim, Hanmei Choi, Eunyoung Jo, Gonsu Kang, Sungho Kang, Sungho Heo
  • Patent number: 8800336
    Abstract: Disclosed herein is an apparatus and method for forming a product having an asymmetric cross-section using a ring rolling process. The method of forming a product having an asymmetric cross-section uses a ring rolling process that uses a ring rolling apparatus, the ring rolling apparatus comprising: a main roll pressing a circumferential outer surface of a blank, a pressure roll pressing a circumferential inner surface of the blank, and a pair of axial rolls pressing upper and lower surfaces of the blank, wherein a protrusion provided on the pressure roll comes into contact with a depressed portion formed on the circumferential inner surface of the blank, and as a width of the blank varies, the pressure roll moves in a vertical direction.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: August 12, 2014
    Assignee: PSM, Inc.
    Inventors: Jong-hoon Kang, Hyun-jun Kim, Hong-il Jo, Young-myung Kim
  • Patent number: 8800335
    Abstract: Disclosed herein is a method of manufacturing a flange for wind towers through a ring rolling process. The ring rolling process makes use of a ring rolling machine. The ring rolling machine includes a main roll which presses a circumferential outer surface of a blank, a pressure roll which presses a circumferential inner surface of the blank, and a pair of axial rolls which press upper and lower surfaces of the blank. The method includes expanding an inner diameter and outer diameter of the blank using the ring rolling machine, transferring the pressure roll vertically so that a protrusion provided on a circumferential outer surface of the pressure roll comes into contact with the circumferential inner surface of the blank, and forming a depression in the circumferential inner surface of the blank using the protrusion of the pressure roll.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: August 12, 2014
    Assignee: PMS, Inc.
    Inventors: Jong-hoon Kang, Hyun-jun Kim, Hong-il Jo, Young-myung Kim