Patents by Inventor Jong Huh

Jong Huh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240133642
    Abstract: The present invention relates to an integrated connector and a heat exchanger including the same, in which a connector main body is formed by pressing one pipe, a cap is press-fitted into the connector main body, such that the integrated connector is formed so that an interior of the connector main body is blocked by the cap. Therefore, the number of components used to manufacture a connector, which connects and securely couples a header tank and a gas-liquid separator, may be reduced, the integrated connector may be easily manufactured, and a brazing defect may be reduced at portions where the integrated connector is joined to the header tank and the gas-liquid separator of the heat exchanger.
    Type: Application
    Filed: September 26, 2023
    Publication date: April 25, 2024
    Inventors: Seung Hark SHIN, Woon Sik KIM, Dae Sung NOH, Hyunwoo CHO, Min Won SEO, Sung Hong SHIN, Jong Du LEE, Jung Hyun CHO, Uk HUH
  • Patent number: 11954890
    Abstract: The present disclosure relates to an apparatus and method for fast refining segmentation for a V-PCC encoder. The apparatus may include a grid segmentation unit segmenting a coordinate space of a point cloud into grid units, and an edge cube search unit searching a cube containing one or more points among the cubes segmented into grid units and containing a segment boundary. The apparatus may also include a surrounding cube search unit searching an edge surrounding cube containing one or more points within a predetermined range from the edge cube, and a smooth score calculation unit calculating smooth scores for all the edge surrounding cubes and all the edge cubes. The apparatus may further include a projection plane index update unit obtaining a normal score based on the calculated smooth scores and updating a projection plane index of each point in the edge cube using the normal score.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: April 9, 2024
    Assignee: Korea Electronics Technology Institute
    Inventors: Yong Hwan Kim, Jieon Kim, JinGang Huh, Jong-geun Park
  • Publication number: 20240097218
    Abstract: Methods and systems for executing tracking and monitoring manufacturing data of a battery are disclosed. One method includes: receiving, by a server system, sensing data of the battery from a sensing system; generating, by the server system, mapping data based on the sensing data; generating, by the server system, identification data of the battery based on the sensing data; generating, by the server system, monitoring data of the battery based on the sensing data, the identification data, and the mapping data; and generating, by the server system, display data for displaying a simulated electrode of the battery on a graphical user interface based on the monitoring data of the battery.
    Type: Application
    Filed: August 31, 2023
    Publication date: March 21, 2024
    Inventors: Min Kyu Sim, Jong Seok Park, Min Su Kim, Jae Hwan Lee, Ki Deok Han, Eun Ji Jo, Su Wan Park, Gi Yeong Jeon, June Hee Kim, Wi Dae Park, Dong Min Seo, Seol Hee Kim, Dong Yeop Lee, Jun Hyo Su, Byoung Eun Han, Seung Huh
  • Publication number: 20070279940
    Abstract: Provided are embodiments of an optical sheet and a backlight assembly having the optical sheet. The optical sheet can include a body, a plurality of protrusions, and a plurality of embossed portions. The body can form a substrate. One surface of the body can be provided in a planar shape, and the other surface of the body can include the plurality of protrusions, where the protrusions have a triangular shaped cross-section. Each of the protrusions can be configured with the plurality of embossed, which may be formed by a microlens pattern.
    Type: Application
    Filed: April 12, 2007
    Publication date: December 6, 2007
    Inventors: Cheul Kim, Sang Kim, Jong Huh, Dong Kim, Ju Lee, Min Kim, Hyun Shin, Yong Kim
  • Publication number: 20060239008
    Abstract: An optical sheet includes a substrate onto which light is incident, and a convex part protruded from the substrate by a predetermined thickness. A thickness of the convex part increases from an edge to a center thereof.
    Type: Application
    Filed: December 27, 2005
    Publication date: October 26, 2006
    Inventors: Cheul Kim, Sang Kim, Jong Huh, Dong Kim, Ki Jeon, Ju Lee, Eun Ham, Myung Lee
  • Patent number: 5923068
    Abstract: Electrostatic discharge protection device is provided that protects the gate insulating layer without using an additional circuit to lower the trigger voltage of a thyristor. The electrostatic discharge protection device includes first and second impurity regions of a bipolar transistor being spaced a predetermined distance apart in a first conductivity type semiconductor substrate, and first and second impurity regions of a field transistor perpendicular to and along both sides of the first and second impurity regions of the bipolar transistor. A gate line formed between the first and second impurity regions of the bipolar transistor on the semiconductor substrate is coupled to one of the impurity regions of the field transistor. A Vss line is coupled to the other impurity region of the field transistor. The Vss line is also coupled to the first impurity region of the bipolar transistor. A metal layer is coupled to the first impurity region of the bipolar transistor and a pad.
    Type: Grant
    Filed: September 17, 1997
    Date of Patent: July 13, 1999
    Assignee: LG Semicon Co., Ltd.
    Inventors: Hyeok Jae Lee, Yun Jong Huh
  • Patent number: 5756389
    Abstract: A semiconductor device isolating method is disclosed which may include the steps of: forming a buffer layer and an insulating layer on a semiconductor substrate, and etching to remove partially the insulating layer so as to form an opening corresponding to the device isolating region; forming hemispherical polysilicon patterns on the whole surface of the substrate; removing the buffer layer exposed between the HSG-Si patterns on the bottom of the opening, and dry-etching the resultant exposed silicon regions to form a plurality of trenches and silicon poles with a certain depth and length; forming an oxide layer on the inside of the trench, and filling the interior of the trench with polysilicon; and oxidizing the polysilicon filled in the trench to form a device isolating region.
    Type: Grant
    Filed: April 8, 1996
    Date of Patent: May 26, 1998
    Assignee: Goldstar Electron Company, Ltd.
    Inventors: Jun-Hee Lim, Yoon-Jong Huh