Patents by Inventor Jong-Hyuck HONG

Jong-Hyuck HONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11170385
    Abstract: The inventive concept relates to a radio frequency identification (RFID)-based genuine product certification service system and method employing a code update algorithm for forgery prevention in which a genuine product certification processing server stores an RFID tag access code and a variable genuine product certification code in an RFID tag through a wired or wireless terminal including an RFID writer and reader and a database thereof for genuine product certification to determine whether a product or document is genuine using the tag information stored in the RFID tag and the genuine product certification code when RFID tags are used to prevent imitations (fakes) of medicine, food and beverages, luxury goods, alcohol, products, etc.
    Type: Grant
    Filed: August 15, 2019
    Date of Patent: November 9, 2021
    Assignee: VISUALNET INC.
    Inventor: Jong Hyuck Hong
  • Publication number: 20190370823
    Abstract: The inventive concept relates to a radio frequency identification (RFID)-based genuine product certification service system and method employing a code update algorithm for forgery prevention in which a genuine product certification processing server stores an RFID tag access code and a variable genuine product certification code in an RFID tag through a wired or wireless terminal including an RFID writer and reader and a database thereof for genuine product certification to determine whether a product or document is genuine using the tag information stored in the RFID tag and the genuine product certification code when RFID tags are used to prevent imitations (fakes) of medicine, food and beverages, luxury goods, alcohol, products, etc.
    Type: Application
    Filed: August 15, 2019
    Publication date: December 5, 2019
    Applicant: VISUALNET INC.
    Inventor: Jong Hyuck Hong
  • Patent number: 8924753
    Abstract: An apparatus and method for adaptively changing clock frequencies of a Central Processing Unit (CPU) and a bus in a digital system are provided. The system includes an Adaptive Frequency Scaling (AFS) controller and a clock controller. The AFS controller determines whether to change a clock frequency of the CPU according to operation information of the CPU, and determines whether to change a clock frequency of the bus according to operation information of the bus. The clock controller generates a clock frequency of the CPU and a clock frequency of the bus according to the determination of the AFS controller.
    Type: Grant
    Filed: October 19, 2011
    Date of Patent: December 30, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae-Hong Park, Ji-Yong Yoon, Kang-Min Lee, Yun-Ju Kwon, Jong-Hyuck Hong
  • Publication number: 20120102345
    Abstract: An apparatus and method for adaptively changing clock frequencies of a Central Processing Unit (CPU) and a bus in a digital system are provided. The system includes an Adaptive Frequency Scaling (AFS) controller and a clock controller. The AFS controller determines whether to change a clock frequency of the CPU according to operation information of the CPU, and determines whether to change a clock frequency of the bus according to operation information of the bus. The clock controller generates a clock frequency of the CPU and a clock frequency of the bus according to the determination of the AFS controller.
    Type: Application
    Filed: October 19, 2011
    Publication date: April 26, 2012
    Applicant: SAMSUNG ELECTRONICS CO. LTD.
    Inventors: Tae-Hong PARK, Ji-Yong YOON, Kang-Min LEE, Yun-Ju KWON, Jong-Hyuck HONG
  • Publication number: 20100138577
    Abstract: An apparatus and a method for writing bitwise data in a System On Chip (SOC) are provided. In the method, a master determines whether a size of data to be written on a slave is equal to or smaller than half of a size of data transmittable at a time. If it is determined that the data is equal to or smaller than half of the size of the data transmittable at a time, the master transmits the data to the slave via a bus. The master transmits a signal representing a bit at which the data is to be written via a bus lane not used for the data transmission.
    Type: Application
    Filed: November 30, 2009
    Publication date: June 3, 2010
    Applicant: SAMSUNG ELECTRONICS CO. LTD.
    Inventors: Jong-Hyuck HONG, In-Kwon PAIK, Tae-Hong PARK