Abstract: The present invention relates to a medium composition for reinforcing the efficacy of stem cells, including ethionamide, a method of reinforcing the efficacy of stem cells, including culturing stem cells in the medium composition, a method of preparing stem cells with reinforced efficacy, stem cells prepared by the above-mentioned method, and a use thereof. According to the present invention, the anti-inflammatory effect of mesenchymal stem cells and expression levels of paracrine factors may be effectively improved by a simple method of treating mesenchymal stem cells with ethionamide, and the stem cells obtained by the above method may be effectively used for preventing or treating an inflammatory disease or a degenerative brain disease.

Abstract: The present invention relates to a medium composition for improving stem cell migration, which includes ethionamide, and a use thereof. According to the present invention, the migration of stem cells may be effectively improved by the adjustment of a culture environment, which is a simple and safe method, without using gene manipulation or a viral vector, and the stem cells improved in migration by the method may be effectively used as a stem cell therapeutic agent that is able to function by rapidly migrating to the damaged region after transplantation.

Abstract: In a semiconductor device and method of manufacturing thereof, a first insulation interlayer is formed on a substrate including a lower conductive pattern. The first insulation interlayer has a first opening through which the lower conductive pattern is exposed. An interconnection is formed in the first opening such that the interconnection is contact with the lower conductive pattern and protruded from the first insulation interlayer. A second insulation interlayer is formed on the first insulation interlayer in such a manner that the second insulation interlayer has a second opening through the interconnection is exposed and the second opening is centrally aligned with the interconnection. An upper conductive pattern is formed in the second opening such that the upper conductive pattern is contacted with the interconnection. Accordingly, a mis-alignment between the upper conductive pattern and the interconnection is prevented.

Abstract: An interconnection structure for a semiconductor device, and a method of forming the same, having a tolerance to high temperature and high speed while not suffering from a problem of a drawing out of a first lower metal pattern. In addition, a second lower metal pattern may be formed, not using a patterning process including a photolithography process, but using a selection etching characteristic instead. Therefore, the second lower metal pattern is self-aligned to the first lower metal pattern, thereby making up for a decrease of a margin in the photolithography process with increasing high integration. As a result, the present invention may be employed to fabricate a semiconductor device to be more highly integrated.