Patents by Inventor Jong-Keuk Park

Jong-Keuk Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11800705
    Abstract: A flash memory device is provided. The flash memory device is disposed on a substrate, a channel layer made of a two-dimensional material, sources and drains disposed at both ends of the channel layer, a tunneling insulating layer having a first dielectric constant and a tunneling insulating layer disposed on the channel layer, a floating gate made of a two-dimensional material, a blocking insulating layer disposed on the floating gate and having a second dielectric constant greater than the first dielectric constant, and an upper gate disposed on the blocking insulating layer.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: October 24, 2023
    Assignee: Korea Institute of Science and Technology
    Inventors: Joon Young Kwak, Eunpyo Park, Suyoun Lee, Inho Kim, Jong-Keuk Park, Jaewook Kim, Jongkil Park, YeonJoo Jeong
  • Publication number: 20230174100
    Abstract: Provided are an autonomous driving system and a correction learning method for autonomous driving. The autonomous driving system includes a sensor configured to collect and output data required for autonomous driving, a first processor configured to output autonomous driving data on the basis of data input from the sensor, a second processor configured to output a driving data adjustment value on the basis of differences between the data input from the sensor, the autonomous driving data input from the first processor, and driving data input from driving by a human driver, and a driving part configured to perform driving on the basis of the autonomous driving data output from the first processor and the driving data adjustment value output from the second processor.
    Type: Application
    Filed: December 1, 2022
    Publication date: June 8, 2023
    Applicant: Korea Institute of Science and Technology
    Inventors: Jae Wook KIM, Dong Hyuk SHIN, Hyeong Cheol JO, Yeon Joo JEONG, Su Youn LEE, Joon Young KWAK, Jong Kil PARK, In Ho KIM, Jong Keuk PARK, Seong Sik PARK
  • Publication number: 20230170017
    Abstract: The present disclosure relates to a nonlinearity compensation circuit for a memristive device. The circuit according to an embodiment includes at least one power source unit to apply an input pulse; a modulation unit connected to the at least one power source unit to adjust a pulse width of an update pulse to be applied to the memristive device; and the memristive device to which the modulated update pulse is applied.
    Type: Application
    Filed: October 14, 2022
    Publication date: June 1, 2023
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jaewook KIM, Kyu Sik MUN, Yeonjoo JEONG, Joon Young KWAK, Jongkil PARK, Suyoun LEE, Jong-Keuk PARK, Inho KIM, Seongsik PARK
  • Publication number: 20220399353
    Abstract: A flash memory device is provided. The flash memory device is disposed on a substrate, a channel layer made of a two-dimensional material, sources and drains disposed at both ends of the channel layer, a tunneling insulating layer having a first dielectric constant and a tunneling insulating layer disposed on the channel layer, a floating gate made of a two-dimensional material, a blocking insulating layer disposed on the floating gate and having a second dielectric constant greater than the first dielectric constant, and an upper gate disposed on the blocking insulating layer.
    Type: Application
    Filed: November 30, 2021
    Publication date: December 15, 2022
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Joon Young KWAK, Eunpyo PARK, Suyoun LEE, Inho KIM, Jong-Keuk PARK, Jaewook KIM, Jongkil PARK, YeonJoo JEONG
  • Patent number: 11527673
    Abstract: An embodiment includes a method of texturing a semiconductor substrate, a semiconductor substrate manufactured using the method, and a solar cell including the semiconductor substrate, the method including: forming metal nanoparticles on a semiconductor substrate, primarily etching the semiconductor substrate, removing the metal nanoparticles, and secondarily etching the primarily etched semiconductor substrate to form nanostructures.
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: December 13, 2022
    Assignee: Korea Institute of Science and Technology
    Inventors: Doh Kwon Lee, In Ho Kim, Won Mok Kim, Jong Keuk Park, Taek Sung Lee, Doo Seok Jeong, Hyeon Seung Lee, Jeung Hyun Jeong
  • Patent number: 11495708
    Abstract: Provided is a method of fabricating a see-through thin film solar cell, the method including preparing a substrate including a molybdenum (Mo) layer on one surface, forming see-through patterns by selectively removing at least parts of the Mo layer, sequentially depositing a chalcogenide absorber layer, a buffer layer, and a transparent electrode layer on the substrate and the Mo layer including the see-through patterns, and forming a see-through array according to a shape of the see-through patterns by removing the chalcogenide absorber layer, the buffer layer, and the transparent electrode layer deposited on the see-through patterns, by irradiating a laser beam from under the substrate toward the transparent electrode layer.
    Type: Grant
    Filed: October 12, 2020
    Date of Patent: November 8, 2022
    Assignee: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jeung Hyun Jeong, Hyeong Geun Yu, Jong Keuk Park, Won Mok Kim
  • Patent number: 11431291
    Abstract: A nano-oscillator device includes a switching element configured to be switched to an ON state at a threshold voltage or above and switched to an OFF state below a holding voltage; and a load element connected to the switching element in series. In the nano-oscillator device, vibration characteristics are implemented by using a switching element and a load element connected thereto in series. Also, the oscillation frequency of the output waveform of the oscillator may be adjusted in real time according to a gate voltage by using a field effect transistor serving as a load element. Using a synchronization characteristic in which the oscillation frequency and phase are locked with respect to an external input, it is possible to implement a computing system based on a network in which a plurality of oscillator devices are coupled.
    Type: Grant
    Filed: September 7, 2021
    Date of Patent: August 30, 2022
    Assignee: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Suyoun Lee, Seon Jeong Kim, Jong-Keuk Park, Inho Kim, Kyeong Seok Lee, Gyu Weon Hwang, Joon Young Kwak, Jaewook Kim, Yeonjoo Jeong, Jongkil Park
  • Patent number: 11411128
    Abstract: Provided is a method of manufacturing a high efficiency flexible thin film solar cell module including a see-thru pattern. The method of manufacturing a flexible thin film solar cell module includes: sequentially forming a light-absorbing layer, a first buffer layer, and a first transparent electrode layer on the release layer; forming a second buffer layer on the exposed bottom surface of the light-absorbing layer; forming a P2 scribing pattern by removing at least one portion of each of the first buffer layer, the light-absorbing layer, and the second buffer layer; forming a second transparent electrode layer on the second buffer layer and the first transparent electrode layer exposed by the P2 scribing pattern; and forming a P4 see-thru pattern by selectively removing at least one portion of the first buffer layer, the light-absorbing layer, the second buffer layer, and the second transparent electrode layer.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: August 9, 2022
    Assignee: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Hyeonggeun Yu, Jeung-hyun Jeong, Won Mok Kim, Jong-Keuk Park, Eunpyung Choi
  • Publication number: 20220230060
    Abstract: A neuromorphic device includes: a neuron block unit including a plurality of neurons; a synapse block unit including a plurality of synapses; and a topology block unit including a plurality of parallel Look-Up Table (LUT) modules including pre and post neuron elements configured with addresses of a presynaptic neuron and a postsynaptic neuron. Each of the plurality of neurons has an intrinsic address, each of the plurality of synapses has an intrinsic address. The parallel LUT module is partitioned based on a first synapse address among synapse addresses, and each of the partitions is indexed based on a second synapse address among the synapse addresses.
    Type: Application
    Filed: July 5, 2019
    Publication date: July 21, 2022
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Vladimir KORNIJCUK, Doo Seok JEONG, Joon Young KWAK, Jae Wook KIM, Jong Kil PARK, In Ho KIM, Jong Keuk PARK, Su Youn LEE, Yeon Joo JEONG, Joon Yeon CHANG
  • Publication number: 20220230059
    Abstract: Provided is a method of operating a neuron in a neuromorphic system. The method includes evaluating a membrane potential value at a corresponding time when receiving an input spike, time-modulating a synaptic weight of the membrane potential value and converting the time-modulated synaptic weight into a membrane potential value at a reference time, and generating an output spike when the membrane potential value at the reference time exceeds a certain threshold value. The membrane potential value at the reference time is represented by a floating point number including a predetermined bit of exponent and mantissa, and the floating point number includes time information. The method further includes accessing a memory and scanning a neural state variable when a timer is updated to “0” to update the neural state variable to an updated value at a reference time.
    Type: Application
    Filed: January 19, 2022
    Publication date: July 21, 2022
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jong Kil PARK, In Ho KIM, Su Youn LEE, Jong Keuk PARK, Joon Young KWAK, Jae Wook KIM, Yeon Joo JEONG
  • Publication number: 20220156565
    Abstract: Embodiments of inventive concepts relate to a neuromorphic circuit including a flash memory-based spike regulator capable of generating a stable spike signal with a small number of devices. The neuromorphic circuit may generate a simple and stable spike signal using a flash memory-based spike regulator. Therefore, it is possible to implement a semiconductor neuromorphic circuit at low power and low cost by using the spike regulator of the present invention. Example embodiments of inventive concepts provide a neuromorphic circuit comprising a control signal generator for generating a control signal for generating a pulse signal; and a spike regulator for generating a spike signal in response to the control signal.
    Type: Application
    Filed: March 18, 2021
    Publication date: May 19, 2022
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Joon Young KWAK, Suyoun LEE, Inho KIM, Jong-Keuk PARK, Kyeong Seok LEE, Jaewook KIM, Jongkil PARK, YeonJoo JEONG, Gyuweon HWANG
  • Publication number: 20220138546
    Abstract: A neuromorphic circuit according to example embodiments of inventive concepts includes a first neuron array including a plurality of neuron circuits generating a spike signal; a first synapse array including a plurality of first synapse circuits to process and output the spike signal transmitted from the first neuron array; a second synapse array including a plurality of second synapse circuits; a first connecting block positioned between the first synapse array and the second synapse array and connecting the first synapse array and the second synapse array in response to a control signal; and a control logic to generate the control signal. The neuromorphic circuit may easily expand the size of the synapse element array to a desired size by using a connecting block.
    Type: Application
    Filed: March 18, 2021
    Publication date: May 5, 2022
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Joon Young KWAK, Suyoun LEE, Inho KIM, Jong-Keuk PARK, Kyeong Seok LEE, Jaewook KIM, Jongkil PARK, YeonJoo JEONG, Gyuweon HWANG
  • Patent number: 11233165
    Abstract: Provided is a multi-junction solar cell in which two or more absorption layers having different bandgaps are stacked on one another. The multi-junction solar cell includes a first cell including a first absorption layer, and a second cell electrically connected in series onto the first cell, wherein the second cell includes a second absorption layer having a higher bandgap compared to the first absorption layer, and a plurality of recesses penetrating through the second absorption layer.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: January 25, 2022
    Assignee: Korea Institute of Science and Technology
    Inventors: Jeung Hyun Jeong, In Ho Kim, Won Mok Kim, Jong Keuk Park, Hyeong Geun Yu
  • Publication number: 20210210645
    Abstract: Provided is a chalcogenide solar cell including a substrate, a transparent conducting oxide (TCO) back contact provided on the substrate, a chalcogenide light absorbing layer provided on the TCO back contact and including at least copper (Cu), gallium (Ga), and silver (Ag), and a TCO front contact provided on the chalcogenide light absorbing layer, wherein a Cu-rich region having a content of Cu higher than an average Cu content of the chalcogenide light absorbing layer is provided at an interface where the chalcogenide light absorbing layer is in contact with the TCO back contact.
    Type: Application
    Filed: October 19, 2017
    Publication date: July 8, 2021
    Inventors: Jeung Hyun JEONG, Won Mok KIM, Jong Keuk PARK
  • Publication number: 20210135041
    Abstract: Provided is a method of fabricating a see-through thin film solar cell, the method including preparing a substrate including a molybdenum (Mo) layer on one surface, forming see-through patterns by selectively removing at least parts of the Mo layer, sequentially depositing a chalcogenide absorber layer, a buffer layer, and a transparent electrode layer on the substrate and the Mo layer including the see-through patterns, and forming a see-through array according to a shape of the see-through patterns by removing the chalcogenide absorber layer, the buffer layer, and the transparent electrode layer deposited on the see-through patterns, by irradiating a laser beam from under the substrate toward the transparent electrode layer.
    Type: Application
    Filed: October 12, 2020
    Publication date: May 6, 2021
    Inventors: Jeung Hyun JEONG, Hyeong Geun YU, Jong Keuk PARK, Won Mok KIM
  • Publication number: 20210135029
    Abstract: Provided is a method of manufacturing a high efficiency flexible thin film solar cell module including a see-thru pattern. The method of manufacturing a flexible thin film solar cell module includes: sequentially forming a light-absorbing layer, a first buffer layer, and a first transparent electrode layer on the release layer; forming a second buffer layer on the exposed bottom surface of the light-absorbing layer; forming a P2 scribing pattern by removing at least one portion of each of the first buffer layer, the light-absorbing layer, and the second buffer layer; forming a second transparent electrode layer on the second buffer layer and the first transparent electrode layer exposed by the P2 scribing pattern; and forming a P4 see-thru pattern by selectively removing at least one portion of the first buffer layer, the light-absorbing layer, the second buffer layer, and the second transparent electrode layer.
    Type: Application
    Filed: October 14, 2020
    Publication date: May 6, 2021
    Inventors: Hyeonggeun YU, Jeung-hyun JEONG, Won Mok KIM, JONG-KEUK PARK, Eunpyung CHOI
  • Publication number: 20200343404
    Abstract: An embodiment includes a method of texturing a semiconductor substrate, a semiconductor substrate manufactured using the method, and a solar cell including the semiconductor substrate, the method including: forming metal nanoparticles on a semiconductor substrate, primarily etching the semiconductor substrate, removing the metal nanoparticles, and secondarily etching the primarily etched semiconductor substrate to form nanostructures.
    Type: Application
    Filed: November 1, 2017
    Publication date: October 29, 2020
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Doh Kwon LEE, In Ho Kim, Won Mok Kim, Jong Keuk Park, Taek Sung Lee, Doo Seok Jeong, Hyeon Seung Lee, Jeung Hyun Jeong
  • Publication number: 20200274015
    Abstract: Provided is a multi-junction solar cell in which two or more absorption layers having different bandgaps are stacked on one another. The multi-junction solar cell includes a first cell including a first absorption layer, and a second cell electrically connected in series onto the first cell, wherein the second cell includes a second absorption layer having a higher bandgap compared to the first absorption layer, and a plurality of recesses penetrating through the second absorption layer.
    Type: Application
    Filed: March 27, 2019
    Publication date: August 27, 2020
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jeung Hyun Jeong, In Ho Kim, Won Mok Kim, Jong Keuk Park, Hyeong Geun Yu
  • Patent number: 10697073
    Abstract: A method for manufacturing an electrode for hydrogen production using a tungsten carbide nanoflake may include: forming a tungsten carbide nanoflake on a nanocrystalline diamond film by means of a chemical vapor deposition process in which hydrogen plasma is applied; and increasing activity of the tungsten carbide nanoflake to a hydrogen evolution reaction by removing an oxide layer or a graphene layer from a surface of the tungsten carbide nanoflake. Since an oxide layer and/or a graphene layer of a surface of tungsten carbide is removed by means of cyclic cleaning after tungsten carbide is formed, hydrogen evolution reaction (HER) activity of the tungsten carbide may be increased, thereby enhancing utilization as a catalyst electrode.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: June 30, 2020
    Assignee: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Wook Seong Lee, Young-Jin Ko, Young Joon Baik, Jong-Keuk Park, Kyeong Seok Lee, Inho Kim, Doo Seok Jeong
  • Patent number: 10566478
    Abstract: Provided are a thin-film solar cell module structure and a method of manufacturing the same.
    Type: Grant
    Filed: September 15, 2017
    Date of Patent: February 18, 2020
    Assignee: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jeung-Hyun Jeong, Jong-Keuk Park, Won Mok Kim, Seung Hee Han, Doh Kwon Lee