Patents by Inventor Jong Kuk Hong

Jong Kuk Hong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9338887
    Abstract: The present invention relates to a core substrate, a manufacturing method thereof, and a structure for a metal via. In accordance with an embodiment of the present invention, a core substrate including: an insulation layer; a plurality of metal vias passing through the insulation layer and formed to become wider from upper and lower surfaces to a middle part of the insulation layer; and a conductive layer formed on the upper and lower surfaces of the insulation layer and connected to the plurality of metal vias. Further, a manufacturing method thereof and a structure for a metal via are provided.
    Type: Grant
    Filed: September 10, 2013
    Date of Patent: May 10, 2016
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae Hoon Choi, Jong Kuk Hong
  • Publication number: 20140174798
    Abstract: Disclosed herein are a metal core substrate and a method of manufacturing the same. The method of manufacturing a metal core substrate includes: forming a metal layer into which connection bridges are inserted; laminating an insulating layer and a copper foil on an upper surface and a lower surface of the metal layer en bloc; and removing the connection bridges.
    Type: Application
    Filed: December 11, 2013
    Publication date: June 26, 2014
    Applicant: Samsung Electro-Mechanics Co., Ltd.,
    Inventors: Jae Hoon CHOI, Jong Kuk HONG
  • Publication number: 20140144693
    Abstract: There is provided a printed circuit board, including: a core layer, a conductive via formed in a via hole of the core layer, an upper land formed on an upper surface of the conductive via, and a lower land formed on a lower surface of the conductive via, wherein a center of the upper land and a center of the lower land do not coincide with each other on a plane, so that the center of the upper land and the center of the lower land formed in the printed circuit board are arranged so as not to coincide with each other, thereby increasing durability of an insulating region against pressure in a wet process, and thus damage to the printed circuit board can be reduced.
    Type: Application
    Filed: February 6, 2013
    Publication date: May 29, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Hoon CHOI, Jong Kuk HONG
  • Publication number: 20140102770
    Abstract: The present invention relates to a core substrate, a manufacturing method thereof, and a structure for a metal via. In accordance with an embodiment of the present invention, a core substrate including: an insulation layer; a plurality of metal vias passing through the insulation layer and formed to become wider from upper and lower surfaces to a middle part of the insulation layer; and a conductive layer formed on the upper and lower surfaces of the insulation layer and connected to the plurality of metal vias. Further, a manufacturing method thereof and a structure for a metal via are provided.
    Type: Application
    Filed: September 10, 2013
    Publication date: April 17, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Hoon CHOI, Jong Kuk HONG
  • Publication number: 20130313004
    Abstract: A package substrate includes a solder resist layer having a level surface, a circuit pattern buried in the solder resist layer, and a bump protruding from the solder resist layer.
    Type: Application
    Filed: July 30, 2013
    Publication date: November 28, 2013
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jin-Yong AN, Chang-Sup Ryu, Jong-Kuk Hong
  • Publication number: 20130243941
    Abstract: A method of manufacturing a coreless substrate having filled via pads, including: forming a first insulating layer on one side of a carrier forming a build-up layer including a build-up insulating layer and a build-up circuit layer having a build-up via on the first insulating layer, and forming a second insulating layer on the build-up layer; removing the carrier, and forming via-holes in the first and second insulating layers; and conducting a filled plating process in the via-holes of the first and second insulating layers thus forming first and second filled via pads therein.
    Type: Application
    Filed: May 7, 2013
    Publication date: September 19, 2013
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seok Kyu LEE, Soon Oh Jung, Jong Kuk Hong, Soon Jin Cho
  • Patent number: 8499444
    Abstract: A package substrate and a method of manufacturing the package substrate are disclosed. The method of manufacturing the package substrate may include stacking a second metal layer in which at least one hole is formed over a first metal layer, stacking a barrier layer over the first metal layer exposed in the hole and over the second metal layer, forming at least one bump by filling the hole with a conductive metal, stacking an insulation layer over the bump and forming a circuit pattern over the insulation layer, and removing the first metal layer, the second metal layer, and the barrier layer.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: August 6, 2013
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jin-Yong An, Chang-Sup Ryu, Jong-Kuk Hong
  • Patent number: 8445790
    Abstract: Disclosed herein is a coreless substrate having filled via pads and a method of manufacturing the same. Insulating layers are formed on both sides of a build-up layer, and via-pads are embedded in the insulating layers such that the via-pads are flush with the insulating layers. The via pads are not separated from a substrate, and thus reliability of the pads is increased. Flatness of bumps is increased, and thus bonding of flip chips becomes easy.
    Type: Grant
    Filed: January 22, 2009
    Date of Patent: May 21, 2013
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seok Kyu Lee, Soon Oh Jung, Jong Kuk Hong, Soon Jin Cho
  • Publication number: 20130119540
    Abstract: Disclosed herein are a semiconductor package and a method for manufacturing the same. The method includes preparing a substrate having one surface and the other surface; mounting a semiconductor device mounted on one surface of the substrate; forming external connection terminals on the other surface of the substrate; forming a warpage preventing layer formed on one surface of the substrate or the other surface of the substrate; and performing a reflow process on the substrate.
    Type: Application
    Filed: January 31, 2012
    Publication date: May 16, 2013
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jong Kuk Hong, Keung Jin Sohn, Jung Hwan Park
  • Patent number: 8051559
    Abstract: A method of manufacturing a multi-layer board is disclosed. The method may include forming a detachable separation layer over a support; forming a first solder resist layer over the separation layer; stacking a metal foil over the first solder resist layer; forming a circuit pattern over the metal foil; forming an insulation part over the first solder resist layer such that the circuit pattern is covered; forming a second solder resist layer over the insulation part; and separating a circuit stack unit, which includes the first solder resist layer, the metal foil, the circuit pattern, the insulation part, and the second solder resist layer, from the support by disconnecting the separation layer and the support. This method uses a simple process to reduce manufacture costs and shorten manufacture times.
    Type: Grant
    Filed: September 24, 2008
    Date of Patent: November 8, 2011
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Ki-Hwan Kim, Jong-Kuk Hong, Jin-Yong An
  • Patent number: 7971352
    Abstract: A method of manufacturing a printed circuit board having solder balls. The method may include: stacking a second carrier, in which at least one hole is formed, over one side of a first carrier; forming at least one solder bump by filling the hole with a conductive material; forming a circuit pattern layer, which is electrically connected with the solder bump, on the second carrier; and exposing the solder bump by removing the first carrier and the second carrier. Using this method, uniform hemispherical solder balls with fine pitch can be formed as a part of the manufacturing process, without having to attach the solder balls separately. Carriers may be used to serve as supports during the manufacturing process, whereby deformations can be prevented in the board.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: July 5, 2011
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Shuhichi Okabe, Jin-Yong An, Seok-Kyu Lee, Soon-Oh Jung, Jong-Kuk Hong, Hae-Nam Seo
  • Publication number: 20110097553
    Abstract: Disclosed is a trench substrate, which includes a first insulating layer having trenches formed therein, a second insulating layer disposed on a lower surface of the first insulating layer and having laser processability inferior to that of the first insulating layer, and a negative pattern formed in the trenches, and in which the second insulating layer having laser processability inferior to that of the first insulating layer functions as a stopper, so that the trenches having the same shape are formed in the first insulating layer, thus enabling the formation of a fine and uniform circuit pattern. A method of fabricating the trench substrate is also provided.
    Type: Application
    Filed: December 4, 2009
    Publication date: April 28, 2011
    Inventors: Jong Kuk Hong, Soon Jin Cho, Sun Uk Hwang
  • Publication number: 20100096177
    Abstract: Disclosed herein is a coreless substrate having filled via pads and a method of manufacturing the same. Insulating layers are formed on both sides of a build-up layer, and via-pads are embedded in the insulating layers such that the via-pads are flush with the insulating layers. The via pads are not separated from a substrate, and thus reliability of the pads is increased. Flatness of bumps is increased, and thus bonding of flip chips becomes easy.
    Type: Application
    Filed: January 22, 2009
    Publication date: April 22, 2010
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seok Kyu Lee, Soon OH Jung, Jong Kuk Hong, Soon Jin Cho
  • Publication number: 20090236125
    Abstract: A method of manufacturing a multi-layer board is disclosed. The method may include forming a detachable separation layer over a support; forming a first solder resist layer over the separation layer; stacking a metal foil over the first solder resist layer; forming a circuit pattern over the metal foil; forming an insulation part over the first solder resist layer such that the circuit pattern is covered; forming a second solder resist layer over the insulation part; and separating a circuit stack unit, which includes the first solder resist layer, the metal foil, the circuit pattern, the insulation part, and the second solder resist layer, from the support by disconnecting the separation layer and the support. This method uses a simple process to reduce manufacture costs and shorten manufacture times.
    Type: Application
    Filed: September 24, 2008
    Publication date: September 24, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Ki-Hwan Kim, Jong-Kuk Hong, Jin-Yong An
  • Publication number: 20090169837
    Abstract: A package substrate and a method of manufacturing the package substrate are disclosed. The method of manufacturing the package substrate may include stacking a second metal layer in which at least one hole is formed over a first metal layer, stacking a barrier layer over the first metal layer exposed in the hole and over the second metal layer, forming at least one bump by filling the hole with a conductive metal, stacking an insulation layer over the bump and forming a circuit pattern over the insulation layer, and removing the first metal layer, the second metal layer, and the barrier layer.
    Type: Application
    Filed: June 30, 2008
    Publication date: July 2, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jin-Yong An, Chang-Sup Ryu, Jong-Kuk Hong
  • Publication number: 20090151160
    Abstract: A method of manufacturing a printed circuit board having solder balls. The method may include: stacking a second carrier, in which at least one hole is formed, over one side of a first carrier; forming at least one solder bump by filling the hole with a conductive material; forming a circuit pattern layer, which is electrically connected with the solder bump, on the second carrier; and exposing the solder bump by removing the first carrier and the second carrier. Using this method, uniform hemispherical solder balls with fine pitch can be formed as a part of the manufacturing process, without having to attach the solder balls separately. Carriers may be used to serve as supports during the manufacturing process, whereby deformations can be prevented in the board.
    Type: Application
    Filed: June 19, 2008
    Publication date: June 18, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Shuhichi Okabe, Jin-Yong An, Seok-Kyu Lee, Soon-Oh Jung, Jong-Kuk Hong, Hae-Nam Seo
  • Publication number: 20090084494
    Abstract: A substrate manufacturing method is disclosed. A substrate manufacturing method, comprising: providing a support body on which a first separation layer is formed; forming a second separation layer on the first separation layer; forming an adhesion layer which covers the first separation layer and the second separation layer; forming a circuit stack body on the adhesion layer; cutting the circuit stack body, the adhesion layer and the second separation layer to a pre-determined shape; and forming a circuit stack unit by separating the second layer from the first layer, provides easy separation of the circuit stack pattern, which formed on the support body, from the support body and reduced manufacturing cost by reducing number of process and required materials for manufacturing coreless thin substrate.
    Type: Application
    Filed: January 10, 2008
    Publication date: April 2, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jin-Yong An, Joon-Sung Kim, Jong-Kuk Hong, Chang-Sup Ryu
  • Publication number: 20090073670
    Abstract: A multilayered printed circuit board and a fabricating method thereof are disclosed. A method that includes repeating processes of forming at least one circuit pattern, and at least one insulation layer that covers the circuit pattern, over a carrier and interconnecting circuit patterns on different layers with vias; stacking a metal stiffener over the insulation layer; repeating processes of forming at least one insulation layer and at least one circuit pattern over the stiffener and interconnecting circuit patterns on different layers with vias; and removing the carrier, can be used to reduce warpage in the board and improve workability.
    Type: Application
    Filed: March 17, 2008
    Publication date: March 19, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jong-Kuk Hong, Jin-Yong An, Jae-Joon Lee
  • Publication number: 20090038837
    Abstract: A multilayered printed circuit board is disclosed. A method of manufacturing the multilayered printed circuit board, which includes: forming a metal layer and a lower-circuit-forming pattern in order on a carrier, and forming a lower circuit by filling a conductive material in the lower-circuit-forming pattern; removing the lower-circuit-forming pattern, stacking an insulation resin, and forming at least one via hole connecting with the lower circuit; forming at least one inner circuit and at least one interlayer connector connecting the inner circuit with the lower circuit on the insulation resin, to form a pair of circuit parts; and aligning the pair of circuit parts, attaching the pair of circuit parts to each other, and removing the carrier and the metal layer, allows the forming of fine-lined circuits and provides a thin board, while preventing bending and warpage in the board.
    Type: Application
    Filed: March 27, 2008
    Publication date: February 12, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Shuhichi Okabe, Jin-Yong An, Seok-Kyu Lee, Soon-Oh Jung, Jong-Kuk Hong, Hae-Nam Seo
  • Publication number: 20080110669
    Abstract: Disclosed herein is a Printed Circuit Board (PCB) having embedded resistors and a method of manufacturing the same, in which contact pads are formed by filling via holes formed on electrode pads with oxidation-resistant conductive material, and resistors are formed on the contact pads. Accordingly, erosion that occurs between the electrode pads and the resistors can be prevented using the contact pads made of oxidation-resistant conductive material, and connections between circuits also can be realized. Furthermore, resistors are formed on a flat plane without any difference in height, attributable to the electrode pads, and thus differences between the resistance values of the built-in resistors can be greatly reduced.
    Type: Application
    Filed: October 26, 2007
    Publication date: May 15, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hwa Sun Park, Tae Eui Kim, Jong Kuk Hong, Sang Jin Baek, Hong Won Kim, Jin Soo Jeong