Patents by Inventor Jong M. Choi

Jong M. Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130211887
    Abstract: A method and system for displaying a multimedia advertisement using a touch screen and a projector, the method and system displaying a plurality of icons such as an advertising icon, and the like, on a touch screen, and displaying a multimedia advertisement corresponding to an icon on a wall screen using a projector when the icon deviates from an area of the touch screen in response to a touch event of a user, is provided.
    Type: Application
    Filed: April 21, 2011
    Publication date: August 15, 2013
    Applicant: D'STRICT HOLDINGS CO., LTD.
    Inventors: Jun H. Kim, Eun H. Lee, Jeong B. Kim, Do Y. Sung, Jong U. Won, Jong M. Choi, Oh H. Kwon, Keun G. Seok, Jin W. Park
  • Patent number: 5612546
    Abstract: A structure and fabrication method for a thin film transistor suitable for a SRAM memory cell. The thin film transistor structure includes a gate electrode formed to have a groove, a gate insulation film formed on the gate electrode, a semiconductor layer formed in the groove of the gate electrode, and impurity regions formed on opposite sides of the semiconductor layer. The method for fabricating the thin film transistor includes forming a gate electrode and a gate insulation film successively on an insulating substrate so as to have a groove, forming a semiconductor layer on the gate insulation film at a part of the groove, and forming source/drain impurity regions by selective injection of impurity ions into opposite sides of the semiconductor layer.
    Type: Grant
    Filed: January 27, 1995
    Date of Patent: March 18, 1997
    Assignee: Goldstar Electron Co., Ltd.
    Inventors: Jong M. Choi, Chang R. Kim
  • Patent number: 5607865
    Abstract: A structure and fabrication method for a thin film transistor which is suitable for an SRAM memory cell. The thin film transistor structure includes an insulating substrate and a semiconductor layer formed as a wall on the insulation substrate. A gate insulation film is formed on the semiconductor layer and over the entire surface of the insulation substrate. A gate electrode formed on the gate insulation film at the center part of the semiconductor layer. Impurity regions are formed in the semiconductor layer on both sides of the gate electrode.
    Type: Grant
    Filed: January 27, 1995
    Date of Patent: March 4, 1997
    Assignee: Goldstar Electron Co., Ltd.
    Inventors: Jong M. Choi, Jong K. Kim
  • Patent number: 5578838
    Abstract: A thin film transistor and a fabricating method for a thin film transistor is disclosed which may be suitable for memory cells of a static random access memory (SRAM) or other devices. A thin film transistor according to this invention may include an insulation substrate, a gate electrode formed to have a negative slope at one side thereof on the insulation substrate, an insulation film side wall formed at the other side of the gate electrode, a gate insulation film formed on the insulation substrate, gate electrode and side wall, a semiconductor layer formed on the gate insulation film, impurity diffusion regions selectively formed within the semiconductor layer over the gate electrode, the side wall and the insulation substrate on the other side of the gate electrode, and a channel region formed within the semiconductor layer at the side of the gate electrode having the negative slope.
    Type: Grant
    Filed: May 12, 1995
    Date of Patent: November 26, 1996
    Assignee: LG Semicon Co., Ltd.
    Inventors: Seok W. Cho, Jong M. Choi
  • Patent number: 5466619
    Abstract: A method for fabricating a thin film transistor including the steps of forming a gate electrode on a substrate; successively depositing a gate insulation layer and a semiconductor layer on the substrate; forming sidewall from semiconductor layer on both said surfaces of the gate electrode by an anisotropic dry etching process; and implanting ions into the semiconductor sidewall. The grain boundaries in the source and drain junctions but not parallel to the channel. prevent leakage current. Thus, the on-to-off current ratio is improved and the device can be designed with a reduced cell size having no off-set margins.
    Type: Grant
    Filed: March 9, 1994
    Date of Patent: November 14, 1995
    Assignee: Goldstar Electron Co., Ltd.
    Inventor: Jong M. Choi
  • Patent number: 5432102
    Abstract: A thin film transistor and a method which forms a channel region (c), a lightly doped drain region (LDD) region and, optionally, an offset region (o), in a portion of a semiconductor layer which is adjacent a sidewall of the gate electrode without the use of photo masks, thereby increasing the permissible degree of miniaturization and improving production yield.
    Type: Grant
    Filed: August 29, 1994
    Date of Patent: July 11, 1995
    Assignee: Goldstar Electron Co., Ltd
    Inventors: Seok W. Cho, Jong M. Choi
  • Patent number: 5418177
    Abstract: A semiconductor memory cell and a process for formation thereof is disclosed. A capacitor is disposed below a transistor, so that a DRAM cell that may be suitable for a high density semiconductor device is produced. A semiconductor device according to the present invention includes: a buried capacitor consisting of a storage electrode, a dielectric layer and a plate electrode formed on a substrate in a planar form; and a transistor formed above the capacitor, a source/drain region of the transistor being connected to the storage electrode of the capacitor.
    Type: Grant
    Filed: March 7, 1994
    Date of Patent: May 23, 1995
    Assignee: Goldstar Electron Co., Ltd.
    Inventor: Jong M. Choi