Abstract: A semiconductor device includes a period defining block suitable for generating a period defining signal corresponding to a predetermined test time period based on a test mode signal and one or more command signals; and a monitoring block suitable for generating a monitoring signal corresponding to an oscillation signal during the test time period based on the period defining signal.

Abstract: A semiconductor device includes a voltage adjust circuit suitable for generating an adjusting voltage according to a counting signal; an oscillating circuit operable by an oscillating control signal, and suitable for outputting an operational clock signal whose frequency is controlled by the adjusting voltage; a pumping circuit suitable for generating an internal voltage by pumping a source voltage according to the operational clock signal; and a counting circuit suitable for generating the counting signal by counting the operational clock signal according to the oscillating control signal.

Abstract: A semiconductor device includes a voltage adjust circuit suitable for generating an adjusting voltage according to a counting signal; an oscillating circuit operable by an oscillating control signal, and suitable for outputting an operational clock signal whose frequency is controlled by the adjusting voltage; a pumping circuit suitable for generating an internal voltage by pumping a source voltage according to the operational clock signal; and a counting circuit suitable for generating the counting signal by counting the operational clock signal according to the oscillating control signal.

Abstract: A semiconductor device includes a period defining block suitable for generating a period defining signal corresponding to a predetermined test time period based on a test mode signal and one or more command signals; and a monitoring block suitable for generating a monitoring signal corresponding to an oscillation signal during the test time period based on the period defining signal.

Abstract: A semiconductor device includes a period defining block suitable for generating a period defining signal corresponding to a predetermined test time period based on a test mode signal and one or more command signals; and a monitoring block suitable for generating a monitoring signal corresponding to an oscillation signal during the test time period based on the period defining signal.

Abstract: A semiconductor device includes: an internal voltage generation block suitable for generating an internal voltage based on first and second external voltages whose power-up sections are different from each other; and a control block suitable for fixing the internal voltage to a predetermined voltage level during a control section including a first power-up section of the first external voltage and a second power-up section of the second external voltage.

Abstract: A semiconductor device includes a period defining block suitable for generating a period defining signal corresponding to a predetermined test time period based on a test mode signal and one or more command signals; and a monitoring block suitable for generating a monitoring signal corresponding to an oscillation signal during the test time period based on the period defining signal.

Abstract: A voltage generator may include: an internal voltage generation unit suitable for generating an internal voltage by pumping an external voltage in response to a pumping cycle signal; and a capacitance adjusting unit comprising a capacitive element which receives and transmits the pumping cycle signal to the internal voltage generation unit, and is suitable for adjusting a capacitance of the capacitive element based on the external voltage.

Abstract: A semiconductor device includes: an internal voltage generation block suitable for generating an internal voltage based on first and second external voltages whose power-up sections are different from each other; and a control block suitable for fixing the internal voltage to a predetermined voltage level during a control section including a first power-up section of the first external voltage and a second power-up section of the second external voltage.

Abstract: A semiconductor device includes: a sense amplification block suitable for sensing and amplifying a data loaded on a pair of data lines based on a pull-up driving voltage supplied through a pull-up power source line and a pull-down driving voltage supplied through a pull-down power source line; and a voltage supply block suitable for supplying a first high voltage as the pull-up driving voltage to the pull-up power source line and a first low voltage as the pull-down driving voltage to the pull-down power source line in a first mode, and supplying the first high voltage as the pull-up driving voltage to the pull-up power source line and a second low voltage having a voltage level lower than a voltage level of the first low voltage as the pull-down driving voltage to the pull-down power source line during an initial period of a second mode which is a subsequent mode of the first mode.

Abstract: A semiconductor device includes: a unit configured to, in a period before power up, compare a voltage obtained by dividing a voltage of a first voltage node at a first division ratio with a voltage obtained by dividing a voltage of a second voltage node at a second division ratio and determine whether to activate an enable signal according to a result of the comparison; and a voltage driving unit configured to increase the voltage of the second voltage node when the enable signal is activated in the period before power up.

Abstract: A semiconductor device includes: a unit configured to, in a period before power up, compare a voltage obtained by dividing a voltage of a first voltage node at a first division ratio with a voltage obtained by dividing a voltage of a second voltage node at a second division ratio and determine whether to activate an enable signal according to a result of the comparison; and a voltage driving unit configured to increase the voltage of the second voltage node when the enable signal is activated in the period before power up.

Abstract: An internal voltage generation circuit includes a first voltage generation unit configured to be operated in response to a first power enable signal to generate a first voltage, a level detection unit configured to detect a level of the first voltage, and a second voltage generation unit configured to be operated in response to a level detection value outputted from the level detection unit to generate a second voltage lower than the first voltage.

Abstract: A temperature sensing circuit includes a temperature-dependent voltage generating block configured to generate a plurality temperature-dependent voltages having voltage levels that are changed according to temperature; and a comparing block configured to compare each voltage level of the temperature-dependent voltages with a voltage level of a predetermined voltage to output thermal codes.

Abstract: An on-die thermal sensor includes an integrating analog-digital converter not requiring a negative reference voltage input. The on die thermal sensor includes a band gap unit, an integrating unit and a counting unit. The band gap unit senses a temperature to output a first voltage corresponding to the sensed temperature. The integrating unit integrates a difference between a reference voltage and a comparing voltage to output a second voltage wherein the comparing voltage has a voltage level higher than that of the reference voltage. The counting unit counts clocks of a clock signal input thereto until the second voltage reaches the first voltage, thereby outputting a thermal code corresponding to the voltage level of the first voltage.

Abstract: A temperature sensing circuit includes a temperature-dependent voltage generating block configured to generate a plurality temperature-dependent voltages having voltage levels that are changed according to temperature; and a comparing block configured to compare each voltage level of the temperature-dependent voltages with a voltage level of a predetermined voltage to output thermal codes.

Abstract: There is provided an analog-digital converter, including: a counting control unit configured to output a counting control signal which is activated while an input voltage is discharged to a predetermined voltage; and a counting unit configured to count an input clock during an activated section of the counting control signal, and output a digital code.

Abstract: A temperature sensing circuit having high accuracy and an on die thermal sensor including the same are provided. The temperature sensing circuit includes a current generating unit for generating a temperature current varied according to a temperature, and a voltage generating unit for mirroring the temperature current and generating a temperature voltage generated by the mirrored temperature current.

Abstract: An on-die thermal sensor includes an integrating analog-digital converter not requiring a negative reference voltage input. The on die thermal sensor includes a band gap unit, an integrating unit and a counting unit. The band gap unit senses a temperature to output a first voltage corresponding to the sensed temperature. The integrating unit integrates a difference between a reference voltage and a comparing voltage to output a second voltage wherein the comparing voltage has a voltage level higher than that of the reference voltage. The counting unit counts clocks of a clock signal input thereto until the second voltage reaches the first voltage, thereby outputting a thermal code corresponding to the voltage level of the first voltage.