Abstract: A light emitting diode display device comprises a substrate including a plurality of emission areas and a non-emission area between the plurality of emission areas; a planarization layer corresponding to the plurality of emission areas and the non-emission area and disposed on the substrate; a plurality of domes corresponding to the plurality of emission areas and disposed on the planarization layer, the plurality of domes spaced apart from each other; a partition wall corresponding to the non-emission area and disposed on the planarization layer, the partition wall spaced apart from the plurality of domes; a first electrode covering the planarization layer in one of the plurality of emission areas, one or more of the plurality of domes and at least a portion of the partition wall; and a bank disposed in the non-emission area and covering the partition wall.

Abstract: A display device and a fabrication method thereof are provided. In a dual-link structure for a narrow bezel, first link wirings are formed on the same layer that the gate lines are formed and second link wirings are formed on the same layer that the data lines are formed. The first link wirings and the second link wirings are formed in a non-display area. Or auxiliary link wirings are further formed over the first link wirings and the second link wirings respectively. Or the first link wiring and second link wiring are divided two pieces of sub-link wirings. The sub-link wirings consisting the one link wiring are connected respectively and are formed on the different layer, whereby a defective image due to a difference in resistance between neighboring link wirings can be improved.

Abstract: A display device and a fabrication method thereof are provided. In a dual-link structure for a narrow bezel, first link wirings are formed on the same layer that the gate lines are formed and second link wirings are formed on the same layer that the data lines are formed. The first link wirings and the second link wirings are formed in a non-display area. Or auxiliary link wirings are further formed over the first link wirings and the second link wirings respectively. Or the first link wiring and second link wiring are divided two pieces of sub-link wirings. The sub-link wirings consisting the one link wiring are connected respectively and are formed on the different layer, whereby a defective image due to a difference in resistance between neighboring link wirings can be improved.