Abstract: A complementary thin film transistor (TFT) includes a substrate and a first TFT and a second TFT disposed on the substrate, wherein a first conductive semiconductor layer of the first TFT and a second gate electrode layer of the second TFT are disposed in the same layer and include the same material.

Abstract: A sealing device comprises a first insert body and a second insert body. The first insert body has an annular first frame, and a first sealing part coupled to the first frame. The second insert body has an annular second frame having a diameter smaller than that of the first frame, and a second sealing part coupled to the second frame. The second insert body rotates relative to the first insert body. The first insert body and the second insert body are arranged such that a gap is formed between the first sealing part and the second sealing part. The second sealing part has a first surface facing the first sealing part and spaced apart from the second frame in a first axial direction; and a first baffle protruding toward the first sealing part from the end of the first surface in the outer radial direction thereof.

Abstract: Provided is a high voltage bridge rectifier. The high voltage bridge rectifier includes a supporter, a substrate on the supporter, a plurality of equivalent diode circuits mounted on the substrate, interconnection lines, and terminals. The substrate may include an insulation layer, element pads disposed on a center of the insulation layer, and terminal pads disposed on an edge of the insulation layer to surround the element pads.

Abstract: A sealing device comprises a first insert body and a second insert body. The first insert body has an annular first frame, and a first sealing part coupled to the first frame. The second insert body has an annular second frame having a diameter smaller than that of the first frame, and a second sealing part coupled to the second frame. The second insert body rotates relative to the first insert body. The first insert body and the second insert body are arranged such that a gap is formed between the first sealing part and the second sealing part. The second sealing part has a first surface facing the first sealing part and spaced apart from the second frame in a first axial direction; and a first baffle protruding toward the first sealing part from the end of the first surface in the outer radial direction thereof.

Abstract: Provided is a high voltage bridge rectifier. The high voltage bridge rectifier includes a supporter, a substrate on the supporter, a plurality of equivalent diode circuits mounted on the substrate, interconnection lines, and terminals. The substrate may include an insulation layer, element pads disposed on a center of the insulation layer, and terminal pads disposed on an edge of the insulation layer to surround the element pads.

Abstract: The present invention relates to a method of preparing high-strength coated whole cottonseed for livestock feed, wherein the germination ability of whole cottonseed is removed using high-temperature and high-pressure steam, and the surface of whole cottonseed is coated with gelatinized starch with high viscosity, which is prepared by gelatinizing starch in a preparation process. According the method of the present invention, since the germination ability of whole cottonseed is removed, release of foreign genes into the domestic environment, which may occur when using whole cottonseed for livestock feed, may be fundamentally prevented, and thus the method of the present invention may contribute to protection of domestic plant genetic resources. In addition, the use of gelatinized starch with increased viscosity, which is prepared by gelatinizing starch in a preparation process, may dramatically increase the selection range of coating agents.

Abstract: The present invention provides a novel method for preparing lacosamide with high chiral purity from D-serine. The method of the present invention can obtain lacosamide with high chiral purity in a high yield through a simple and environmentally-friendly process and thus can be easily applied to mass production.

Abstract: A thin film transistor array panel includes a gate line elongated in an extension direction and including a gate and dummy gate electrode extended therefrom; and a source electrode, and a single drain member including a drain electrode at a first end thereof and a dummy drain electrode at an opposing second end thereof. The drain electrode faces the source electrode with respect to the gate electrode, and the dummy drain electrode overlaps the dummy gate electrode. The drain and dummy drain electrode respectively include a plurality of first and second regions each having a predetermined width in the extension direction. A second region includes an edge which forms an angle from about 0 degrees to about 90 degrees with the extension direction, and a planar area of at least one of the plurality of second regions is different from that of remaining second regions.

Abstract: The present invention relates to a method of preparing high-strength coated whole cottonseed for livestock feed, wherein the germination ability of whole cottonseed is removed using high-temperature and high-pressure steam, and the surface of whole cottonseed is coated with gelatinized starch with high viscosity, which is prepared by gelatinizing starch in a preparation process. According the method of the present invention, since the germination ability of whole cottonseed is removed, release of foreign genes into the domestic environment, which may occur when using whole cottonseed for livestock feed, may be fundamentally prevented, and thus the method of the present invention may contribute to protection of domestic plant genetic resources. In addition, the use of gelatinized starch with increased viscosity, which is prepared by gelatinizing starch in a preparation process, may dramatically increase the selection range of coating agents.

Abstract: A thin film transistor array panel includes a gate line elongated in an extension direction and including a gate and dummy gate electrode extended therefrom; and a source electrode, and a single drain member including a drain electrode at a first end thereof and a dummy drain electrode at an opposing second end thereof. The drain electrode faces the source electrode with respect to the gate electrode, and the dummy drain electrode overlaps the dummy gate electrode. The drain and dummy drain electrode respectively include a plurality of first and second regions each having a predetermined width in the extension direction. A second region includes an edge which forms an angle from about 0 degrees to about 90 degrees with the extension direction, and a planar area of at least one of the plurality of second regions is different from that of remaining second regions.

Abstract: A thin film transistor array panel includes a gate line elongated in an extension direction and including a gate and dummy gate electrode extended therefrom; and a source electrode, and a single drain member including a drain electrode at a first end thereof and a dummy drain electrode at an opposing second end thereof. The drain electrode faces the source electrode with respect to the gate electrode, and the dummy drain electrode overlaps the dummy gate electrode. The drain and dummy drain electrode respectively include a plurality of first and second regions each having a predetermined width in the extension direction. A second region includes an edge which forms an angle from about 0 degrees to about 90 degrees with the extension direction, and a planar area of at least one of the plurality of second regions is different from that of remaining second regions.

Abstract: The present invention provides a novel method for preparing lacosamide with high chiral purity from D-serine. The method of the present invention can obtain lacosamide with high chiral purity in a high yield through a simple and environmentally-friendly process and thus can be easily applied to mass production.

Abstract: Provided is a method of fabricating a mold, the method including: forming a first preliminary layer and a second preliminary layer, which are spaced apart from each other and stacked on a substrate; forming a first pattern by patterning the first preliminary layer; forming a first spacer on both sidewalls of the first pattern; forming a second pattern by etching the second preliminary layer by using the first spacer as an etching mask; forming a multilayer structure including the first pattern and the second pattern on the substrate by removing the first spacer; and forming a mold layer covering the multilayer structure.

Abstract: Provided are a semiconductor device and a method of fabricating the same. The method includes: forming a trench in a semiconductor substrate of a first conductive type; forming a trench dopant containing layer including a dopant of a second conductive type on a sidewall and a bottom surface of the trench; forming a doping region by diffusing the dopant in the trench dopant containing layer into the semiconductor substrate; and removing the trench dopant containing layer.

Abstract: A liquid delivery apparatus for the intrathecal delivery of one or more medications to a patient is disclosed. The liquid delivery apparatus generally includes a liquid reservoir, a liquid metering unit fluidly connected to the liquid reservoir, and a catheter delivery tube fluidly connected to the liquid metering unit. Preferably, the liquid delivery apparatus includes two or more liquid reservoirs. In various embodiments, the liquid reservoir includes a deformable balloon and a compressive sleeve spring as a pressure source, the liquid metering unit is a piezoelectrically actuated microvalve, and/or diagnostic sensors are included in the apparatus. The disclosed apparatus are compact, volume-efficient, energy-efficient, capable of delivering accurate fluid volumes, and address problems associated with multi-medication therapies. Methods of operating the liquid delivery apparatus are also disclosed.

Abstract: Provided is a method of fabricating a semiconductor package, including preparing a die including a first metal layer and a second metal layer which are sequentially stacked on a silicon substrate, preparing a package substrate including a lead frame, and forming an adhesive layer between the lead frame and the first metal layer and attaching the die to the package substrate, wherein the forming of the adhesive layer is performed by eutectic bonding between the silicon substrate and the second metal layer. According to the semiconductor package according to an embodiment of the present invention, an adhesive layer can be easily formed by eutectic bonding without a process of forming a preform.

Abstract: A thin film transistor array panel includes a gate line elongated in an extension direction and including a gate and dummy gate electrode extended therefrom; and a source electrode, and a single drain member including a drain electrode at a first end thereof and a dummy drain electrode at an opposing second end thereof. The drain electrode faces the source electrode with respect to the gate electrode, and the dummy drain electrode overlaps the dummy gate electrode. The drain and dummy drain electrode respectively include a plurality of first and second regions each having a predetermined width in the extension direction. A second region includes an edge which forms an angle from about 0 degrees to about 90 degrees with the extension direction, and a planar area of at least one of the plurality of second regions is different from that of remaining second regions.

Abstract: Disclosed is a silicon interposer that can reduce the entire area of a semiconductor package and increase the degree of integration by forming inductors at a lower part in addition to an upper part of a silicon substrate. The silicon interposer includes a silicon substrate, an upper inductor layer formed at the upper part of the silicon substrate and a lower inductor layer formed at the lower part of the silicon substrate.

Abstract: Provided are a semiconductor device and a method of fabricating the same. The method includes: forming a trench in a semiconductor substrate of a first conductive type; forming a trench dopant containing layer including a dopant of a second conductive type on a sidewall and a bottom surface of the trench; forming a doping region by diffusing the dopant in the trench dopant containing layer into the semiconductor substrate; and removing the trench dopant containing layer.

Abstract: Provided are a semiconductor device and a method of fabricating the same. The method includes: forming a trench in a semiconductor substrate of a first conductive type; forming a trench dopant containing layer including a dopant of a second conductive type on a sidewall and a bottom surface of the trench; forming a doping region by diffusing the dopant in the trench dopant containing layer into the semiconductor substrate; and removing the trench dopant containing layer.