Patents by Inventor Jong Mun Kim

Jong Mun Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190393024
    Abstract: Methods for removing residuals after a selective deposition process are provided. In one embodiment, the method includes performing a selective deposition process to form a metal containing dielectric material at a first location of a substrate and performing a residual removal process to remove residuals from a second location of the substrate.
    Type: Application
    Filed: May 2, 2019
    Publication date: December 26, 2019
    Inventors: Jong Mun KIM, Biao LIU, Cheng PAN, Erica CHEN, Chentsau YING, Srinivas NEMANI, Ellie YIEH
  • Publication number: 20180142354
    Abstract: Embodiments of the present invention provide apparatus and methods for reducing non-uniformity and/or skews during substrate processing. One embodiment of the present invention provides a flow equalizer assembly for disposing between a vacuum port and a processing volume in a processing chamber. The flow equalizing assembly includes a first plate having at least one first opening, and a second plate having two or more second openings. The first and second plates define a flow redistributing volume therebetween, and the at least one first opening and the two or more second openings are staggered.
    Type: Application
    Filed: January 19, 2018
    Publication date: May 24, 2018
    Inventors: Sergio Fukuda SHOJI, Hamid NOORBAKHSH, Jong Mun KIM, Jason DELLA ROSA, Ajit BALAKRISHNA
  • Patent number: 9909213
    Abstract: Embodiments of the present invention provide apparatus and methods for reducing non-uniformity and/or skews during substrate processing. One embodiment of the present invention provides a flow equalizer assembly for disposing between a vacuum port and a processing volume in a processing chamber. The flow equalizing assembly includes a first plate having at least one first opening, and a second plate having two or more second openings. The first and second plates define a flow redistributing volume therebetween, and the at least one first opening and the two or more second openings are staggered.
    Type: Grant
    Filed: August 5, 2014
    Date of Patent: March 6, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Sergio Fukuda Shoji, Hamid Noorbakhsh, Jong Mun Kim, Jason Della Rosa, Ajit Balakrishna
  • Patent number: 9748366
    Abstract: An article having alternating oxide layers and nitride layers is etched by an etch process. The etch process includes providing a first gas comprising C4F6H2 in a chamber of an etch reactor, ionizing the C4F6H2 containing gas to produce a plasma comprising a plurality of ions, and etching the article using the plurality of ions.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: August 29, 2017
    Assignee: Applied Materials, Inc.
    Inventors: Jong Mun Kim, Kenny L. Doan, Li Ling, Jairaj Payyapilly, Srinivas D. Nemani, Daisuke Shimizu, Yuju Huang
  • Patent number: 9589832
    Abstract: One or more openings in an organic mask layer deposited on a first insulating layer over a substrate are formed. One or more openings in the first insulating layer are formed through the openings in the organic mask using a first iodine containing gas. An antireflective layer can be deposited on the organic mask layer. One or more openings in the antireflective layer are formed down to the organic mask layer using a second iodine containing gas. The first insulating layer can be deposited on a second insulating layer over the substrate. One or more openings in the second insulating layer can be formed using a third iodine containing gas.
    Type: Grant
    Filed: November 4, 2013
    Date of Patent: March 7, 2017
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Daisuke Shimizu, Jong Mun Kim
  • Patent number: 9305804
    Abstract: Implementations described herein generally relate to semiconductor manufacturing and more particularly to the process of plasma etching an amorphous carbon layer. In one implementation, a method of etching a feature in an amorphous carbon layer is provided. The method comprises transferring a substrate including a patterned photoresist layer disposed above the amorphous carbon layer into an etching chamber, exposing the amorphous carbon layer to a fluorine-free etchant gas mixture including a fluorine-free halogen source gas and a passivation source gas and etching the amorphous carbon layer with a plasma of the fluorine-free etchant gas mixture. It has been found that plasma etching with a fluorine-free halogen based gas mixture reduces the formation of top critical dimension clogging oxides.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: April 5, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Jong Mun Kim, Jairaj J. Payyapilly
  • Patent number: 9299574
    Abstract: Multilayered stacks having layers of silicon interleaved with layers of a dielectric, such as silicon dioxide, are plasma etched with non-corrosive process gas chemistries. Etching plasmas of fluorine source gases, such as SF6 and/or NF3 typically only suitable for dielectric layers, are energized by pulsed RF to achieve high aspect ratio etching of silicon/silicon dioxide bi-layers stacks without the addition of corrosive gases, such as HBr or Cl2. In embodiments, a mask open etch and the multi-layered stack etch are performed in a same plasma processing chamber enabling a single chamber, single recipe solution for patterning such multi-layered stacks. In embodiments, 3D NAND memory cells are fabricated with memory plug and/or word line separation etches employing a fluorine-based, pulsed-RF plasma etch.
    Type: Grant
    Filed: January 17, 2014
    Date of Patent: March 29, 2016
    Assignee: Applied Materials, Inc.
    Inventors: Daisuke Shimizu, Jong Mun Kim
  • Publication number: 20160086771
    Abstract: Multilayered stacks having layers of silicon interleaved with layers of a dielectric, such as silicon dioxide, are plasma etched with non-corrosive process gas chemistries. Etching plasmas of fluorine source gases, such as SF6 and/or NF3 typically only suitable for dielectric layers, are energized by pulsed RF to achieve high aspect ratio etching of silicon/silicon dioxide bi-layers stacks without the addition of corrosive gases, such as HBr or Cl2. In embodiments, a mask open etch and the multi-layered stack etch are performed in a same plasma processing chamber enabling a single chamber, single recipe solution for patterning such multi-layered stacks. In embodiments, 3D NAND memory cells are fabricated with memory plug and/or word line separation etches employing a fluorine-based, pulsed-RF plasma etch.
    Type: Application
    Filed: December 4, 2015
    Publication date: March 24, 2016
    Inventors: Daisuke Shimizu, Jong Mun Kim
  • Patent number: 9269587
    Abstract: Embodiments of the present invention provide methods for etching a material layer using synchronized RF pulses. In one embodiment, a method includes providing a gas mixture into a processing chamber, applying a first RF source power at a first time point to the processing chamber to form a plasma in the gas mixture, applying a first RF bias power at a second time point to the processing chamber to perform an etching process on the substrate, turning off the first RF bias power at a third time point while continuously maintaining the first RF source power on from the first time point through the second and the third time points, and turning off the first RF source power at a fourth time point while continuously providing the gas mixture to the processing chamber from the first time point through the second, third and fourth time points.
    Type: Grant
    Filed: September 6, 2013
    Date of Patent: February 23, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Daisuke Shimizu, Jong Mun Kim, Katsumasa Kawasaki, Sergio Fukuda Shoji
  • Patent number: 9129911
    Abstract: Boron-doped carbon-based hardmask etch processing is described. In an example, a method of patterning a film includes etching a boron-doped amorphous carbon layer with a plasma based on a combination of CH4/N2/O2 and a flourine-rich source such as, but not limited to, CF4, SF6 or C2F6.
    Type: Grant
    Filed: January 30, 2014
    Date of Patent: September 8, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Kenny Linh Doan, Jong Mun Kim, Daisuke Shimizu
  • Publication number: 20150097276
    Abstract: An article having alternating oxide layers and nitride layers is etched by an etch process. The etch process includes providing a first gas comprising C4F6H2 in a chamber of an etch reactor, ionizing the C4F6H2 containing gas to produce a plasma comprising a plurality of ions, and etching the article using the plurality of ions.
    Type: Application
    Filed: September 19, 2014
    Publication date: April 9, 2015
    Inventors: Jong Mun Kim, Kenny L. Doan, Li Ling, Jairaj Payyapilly, Srinivas D. Nemani, Daisuke Shimizu, Yuju Huang
  • Publication number: 20150099367
    Abstract: Implementations described herein generally relate to semiconductor manufacturing and more particularly to the process of plasma etching an amorphous carbon layer. In one implementation, a method of etching a feature in an amorphous carbon layer is provided. The method comprises transferring a substrate including a patterned photoresist layer disposed above the amorphous carbon layer into an etching chamber, exposing the amorphous carbon layer to a fluorine-free etchant gas mixture including a fluorine-free halogen source gas and a passivation source gas and etching the amorphous carbon layer with a plasma of the fluorine-free etchant gas mixture. It has been found that plasma etching with a fluorine-free halogen based gas mixture reduces the formation of top critical dimension clogging oxides.
    Type: Application
    Filed: October 2, 2014
    Publication date: April 9, 2015
    Inventors: Jong Mun KIM, Jairaj J. PAYYAPILLY
  • Publication number: 20150072530
    Abstract: Embodiments of the present invention provide methods for etching a material layer using synchronized RF pulses. In one embodiment, a method includes providing a gas mixture into a processing chamber, applying a first RF source power at a first time point to the processing chamber to form a plasma in the gas mixture, applying a first RF bias power at a second time point to the processing chamber to perform an etching process on the substrate, turning off the first RF bias power at a third time point while continuously maintaining the first RF source power on from the first time point through the second and the third time points, and turning off the first RF source power at a fourth time point while continuously providing the gas mixture to the processing chamber from the first time point through the second, third and fourth time points.
    Type: Application
    Filed: September 6, 2013
    Publication date: March 12, 2015
    Inventors: Jong Mun KIM, Daisuke SHIMIZU, Katsumasa KAWASAKI, Sergio Fukuda SHOJI
  • Publication number: 20150041061
    Abstract: Embodiments of the present invention provide apparatus and methods for reducing non-uniformity and/or skews during substrate processing. One embodiment of the present invention provides a flow equalizer assembly for disposing between a vacuum port and a processing volume in a processing chamber. The flow equalizing assembly includes a first plate having at least one first opening, and a second plate having two or more second openings. The first and second plates define a flow redistributing volume therebetween, and the at least one first opening and the two or more second openings are staggered.
    Type: Application
    Filed: August 5, 2014
    Publication date: February 12, 2015
    Inventors: Sergio Fukuda SHOJI, Hamid NOORBAKHSH, Jong Mun KIM, Jason Della ROSA, Ajit BALAKRISHNA
  • Publication number: 20150001180
    Abstract: A tunable ring assembly, a plasma processing chamber having a tunable ring assembly and method for tuning a plasma process is provided. In one embodiment, a tunable ring assembly includes an outer ceramic ring having an exposed top surface and a bottom surface and an inner silicon ring configured to mate with the outer ceramic ring to define an overlap region, the inner silicon ring having an inner surface, a top surface and a notch formed between the inner surface and the top surface, the inner surface defining an inner diameter of the ring assembly, the notch is sized to accept an edge of a substrate, an outer portion of the top surface of the inner silicon ring configured to contact in the overlap region and underlying an inner portion of the bottom surface of the outer ceramic ring.
    Type: Application
    Filed: September 6, 2013
    Publication date: January 1, 2015
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Kenny Linh DOAN, Jason Della ROSA, Hamid NOORBAKHSH, Jong Mun KIM
  • Publication number: 20140342570
    Abstract: The disclosure concerns a plasma-enhanced etch process in which chamber pressure and/or RF power level is ramped throughout the etch process.
    Type: Application
    Filed: June 7, 2013
    Publication date: November 20, 2014
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Kenny Linh Doan, Daisuke Shimizu, Jong Mun Kim, Sergio Fukuda Shoji, Justin Phi, Katsumasa Kawasaki, Kartik Ramaswamy, James P. Cruse
  • Publication number: 20140213059
    Abstract: Boron-doped carbon-based hardmask etch processing is described. In an example, a method of patterning a film includes etching a boron-doped amorphous carbon layer with a plasma based on a combination of CH4/N2/O2 and a flourine-rich source such as, but not limited to, CF4, SF6 or C2F6.
    Type: Application
    Filed: January 30, 2014
    Publication date: July 31, 2014
    Inventors: Kenny Linh Doan, Jong Mun Kim, Daisuke Shimizu
  • Publication number: 20140213062
    Abstract: Multilayered stacks having layers of silicon interleaved with layers of a dielectric, such as silicon dioxide, are plasma etched with non-corrosive process gas chemistries. Etching plasmas of fluorine source gases, such as SF6 and/or NF3 typically only suitable for dielectric layers, are energized by pulsed RF to achieve high aspect ratio etching of silicon/silicon dioxide bi-layers stacks without the addition of corrosive gases, such as HBr or Cl2. In embodiments, a mask open etch and the multi-layered stack etch are performed in a same plasma processing chamber enabling a single chamber, single recipe solution for patterning such multi-layered stacks. In embodiments, 3D NAND memory cells are fabricated with memory plug and/or word line separation etches employing a fluorine-based, pulsed-RF plasma etch.
    Type: Application
    Filed: January 17, 2014
    Publication date: July 31, 2014
    Inventors: Daisuke SHIMIZU, Jong Mun KIM
  • Patent number: 8778207
    Abstract: Plasma etching of boron-doped carbonaceous mask layers with an etchant gas mixture including CxFy or CxHyFz, and at least one of COS and CF3I. Etchant gas mixtures may further include a carbon-free fluorine source gas, such as SF6 or NF3, and/or an oxidizer, such as O2, for higher etch rates. Nitrogen-containing source gases may also be provided in the etchant gas mixture to reduce sidewall bowing in high aspect ratio (HAR) feature etches.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: July 15, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Jong Mun Kim, Jairaj Payyapilly, Kenny Linh Doan
  • Patent number: 8668837
    Abstract: A method for etching a substrate includes etching at least one first layer of the substrate with a non-uniform substrate temperature and etching at least one second layer of the substrate with uniform substrate temperatures.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: March 11, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Kenny Linh Doan, Jong Mun Kim