Patents by Inventor Jong-Myeon Lee
Jong-Myeon Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220149555Abstract: A contactor block of a self-aligning vertical probe card according to the present invention comprises: at least one vertical contactor array in which a plurality of vertical contactors manufactured by a MEMS process and extending in the longitudinal direction are arranged side by side in the horizontal direction; and a molding layer that exposes the upper and lower ends of the plurality of vertical contactors constituting the vertical contactor array and surrounds and supports the plurality of vertical contactors.Type: ApplicationFiled: December 30, 2019Publication date: May 12, 2022Inventors: Yong Ho CHO, Jong Myeon LEE
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Patent number: 11204369Abstract: A semiconductor device test socket has a shielding structure formed around each contactor so as to prevent signal delay or distortion during a test process and thereby enhance the test reliability. The socket includes a vertical probe comprising a contactor which has a contact terminal to be electrically connected to an external connection terminal of a semiconductor device. The shielding structure which is formed by laminating a conductive material on the outer edge of the contactor and is electrically connected to a ground. The socket further includes an elastic layer which is filled in the space between the contactor and the shielding structure, and surrounds the contactor such that the contact terminal of the contactor is exposed; and a connection film which is formed by laminating a conductive material so as to electrically connect shielding structures of multiple vertical probes.Type: GrantFiled: October 23, 2018Date of Patent: December 21, 2021Assignee: MICRO FRIEND CO., LTDInventors: Yong Ho Cho, Jong Myeon Lee, Tae Kyun Kim
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Publication number: 20210285984Abstract: A semiconductor device test socket, wherein a shielding structure is formed around each contactor so as to prevent signal delay or distortion during a test process and thereby enhance the test reliability, is proposed. The test socket can include: a vertical probe having a contactor which has a contact terminal to be electrically connected to an external connection terminal of a semiconductor device, and a shielding structure which is formed by laminating a conductive material on the outer edge of the contactor and is electrically connected to a ground; and an elastic layer which is filled in the space between the contactor and the shielding structure, and surrounds the contactor such that the contact terminal of the contactor is exposed.Type: ApplicationFiled: October 23, 2018Publication date: September 16, 2021Inventors: Yong Ho CHO, Jong Myeon LEE, Tae Kyun KIM
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Patent number: 10104767Abstract: A printed circuit board includes: a strip substrate sectioned into unit areas; electronic components respectively installed in each of the unit areas; and a separation space disposed between the unit areas.Type: GrantFiled: March 28, 2016Date of Patent: October 16, 2018Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Hyung-Gi Ha, Jong-Myeon Lee, Jong-Rip Kim
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Patent number: 9786573Abstract: An electronic component package includes: a core including a cavity, a first resin layer, a second resin layer and a reinforcing layer disposed between the first resin layer and the second resin layer; and an electronic component disposed in the cavity, wherein a thickness of the first resin layer is different from a thickness of the second resin layer.Type: GrantFiled: July 8, 2016Date of Patent: October 10, 2017Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Jong-Rip Kim, Doo-Hwan Lee, Jong-Myeon Lee
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Publication number: 20170079143Abstract: A printed circuit board includes: a strip substrate sectioned into unit areas; electronic components respectively installed in each of the unit areas; and a separation space disposed between the unit areas.Type: ApplicationFiled: March 28, 2016Publication date: March 16, 2017Applicant: Samsung Electro-Mechanic Co., Ltd.Inventors: Hyung-Gi HA, Jong-Myeon LEE, Jong-Rip KIM
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Publication number: 20170018474Abstract: An electronic component package includes: a core including a cavity, a first resin layer, a second resin layer and a reinforcing layer disposed between the first resin layer and the second resin layer; and an electronic component disposed in the cavity, wherein a thickness of the first resin layer is different from a thickness of the second resin layer.Type: ApplicationFiled: July 8, 2016Publication date: January 19, 2017Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Jong-Rip KIM, Doo-Hwan LEE, Jong-Myeon LEE
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Publication number: 20160270232Abstract: A printed circuit board and a method of manufacturing the same are provided. The printed circuit board includes a core board having a cavity that penetrates through a region of a core layer, an electronic component embedded in the cavity, side surfaces of the cavity contacting the electronic component, and insulating layers disposed on opposite surfaces of the core board.Type: ApplicationFiled: September 30, 2015Publication date: September 15, 2016Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jong Rip KIM, Jong Myeon LEE, Ung Hui SHIN, Doo Hwan LEE
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Patent number: 8637143Abstract: There is provided a Low Temperature Co-fired Ceramic (LTCC) composition, an LTCC substrate comprising the same, and a method of manufacturing the same. The LTCC composition includes 20 to 70 parts by weight of ceramic powder; and 30 to 80 parts by weight of glass component for low-temperature sintering, wherein the ceramic powder has plate-shaped ceramic powder particles and globular ceramic powder particles, and the ceramic powder has a content ratio of the globular ceramic powder particles with respect to the plate-shaped ceramic powder particles in a range of 0 to 1.Type: GrantFiled: January 11, 2011Date of Patent: January 28, 2014Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Beom Joon Cho, Jong Myeon Lee, Yun Hwi Park
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Patent number: 8557617Abstract: A method of manufacturing a light emitting diode package. A cup-shaped package structure with a recess formed therein and an electrode structure formed on a bottom of the recess is prepared. A light emitting diode chip is mounted on a bottom of the recess with a terminal of the chip electrically connected to the electrode structure. A liquid-state transparent resin is injected in the recess and before the liquid-state transparent resin is completely cured, a stamp with a micro rough pattern engraved thereon is applied on an upper surface of the resin. The liquid-state transparent resin is cured with the stamp applied thereon to form a resin encapsulant and the stamp is removed from the resin encapsulant.Type: GrantFiled: February 22, 2007Date of Patent: October 15, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Youn Gon Park, Jong Myeon Lee, Hai Sung Lee, Myung Whun Chang, Ho Sung Choo
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Patent number: 8368097Abstract: An LED package comprises a frame having a concave portion formed in the center thereof; one or more LED chips mounted on the bottom surface of the concave portion; and a lens filled in the concave portion, the lens having an upper surface formed of continuous prismatic irregularities forming concentric circles.Type: GrantFiled: July 13, 2007Date of Patent: February 5, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun Jun Kim, Chang Hwan Choi, Jong Myeon Lee, Dong Woohn Kim, Won Ha Moon
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Publication number: 20120199270Abstract: Provided are a method of manufacturing a multi-layer ceramic substrate. The method includes preparing a non-sintered ceramic laminated structure formed of a plurality of ceramic green sheets; preparing one or more constraining green sheets comprising a first constraining layer formed of a first inorganic powder having a first particle diameter and a second constraining layer formed of a second inorganic powder having a second particle diameter larger than the first particle diameter; disposing the constraining green sheets on the top and the bottom of the ceramic laminated structure; and firing the ceramic laminated structure at a predetermined firing temperature.Type: ApplicationFiled: April 16, 2012Publication date: August 9, 2012Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Beom Joon Cho, Jong Myeon Lee, Ho Sung Choo
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Patent number: 8226852Abstract: The invention relates to a method of forming a phosphor film and a method of manufacturing an LED package incorporating the same. The method of forming a phosphor film includes mixing phosphor and light-transmitting beads in an aqueous solvent such that the nano-sized light-transmitting beads having a first charge are adsorbed onto surfaces of phosphor particles having a second charge. The method also includes coating a phosphor mixture obtained from the mixing step on an area where the phosphor film is to be formed, and drying the coated phosphor mixture to form the phosphor film. The invention further provides a method of manufacturing an LED package incorporating the method of forming the phosphor film.Type: GrantFiled: October 28, 2010Date of Patent: July 24, 2012Assignee: Samsung LED Co., Ltd.Inventors: Hai Sung Lee, Jong Myeon Lee, Ho Sung Choo, Myung Whun Chang, Youn Gon Park
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Patent number: 8182904Abstract: Provided is a laminated ceramic package. The laminated ceramic package includes a laminated ceramic substrate having a conductive pattern therein, a first ceramic layer on the laminated ceramic substrate, and a second ceramic layer on the first ceramic layer. The first ceramic layer has a firing area shrinkage rate of about 1% or less. The second ceramic layer has a cavity receiving electronic components and a different firing shrinkage rate from the first ceramic layer.Type: GrantFiled: December 5, 2008Date of Patent: May 22, 2012Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Beom Joon Cho, Jong Myeon Lee
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Patent number: 8178193Abstract: Provided are a constraining green sheet and a method of manufacturing a multi-layer ceramic substrate. The constraining green sheet includes a first constraining layer and a second constraining layer. The first constraining layer has a side to be disposed on a multi-layer ceramic laminated structure and is formed of a first inorganic powder having a first particle diameter. The second constraining layer is disposed on top of the first constraining layer and is formed of a second inorganic powder having a second particle diameter larger than the first particle diameter. The second constraining layer is equal to or lower than the first constraining layer in terms of powder packing density. A shrinkage suppression rate can be increased and a de-binder passage can be secured in a firing process of the ceramic laminated structure by using the constraining green sheet formed of inorganic powders having different density and particle diameter.Type: GrantFiled: October 28, 2008Date of Patent: May 15, 2012Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Beom Joon Cho, Jong Myeon Lee, Ho Sung Choo
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Publication number: 20120028018Abstract: There is provided a Low Temperature Co-fired Ceramic (LTCC) composition, an LTCC substrate comprising the same, and a method of manufacturing the same. The LTCC composition includes 20 to 70 parts by weight of ceramic powder; and 30 to 80 parts by weight of glass component for low-temperature sintering, wherein the ceramic powder has plate-shaped ceramic powder particles and globular ceramic powder particles, and the ceramic powder has a content ratio of the globular ceramic powder particles with respect to the plate-shaped ceramic powder particles in a range of 0 to 1.Type: ApplicationFiled: January 11, 2011Publication date: February 2, 2012Inventors: Beom Joon CHO, Jong Myeon Lee, Yun Hwi Park
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Patent number: 8093172Abstract: Provided are a glass composition, a dielectric composition and a multi-layer ceramic capacitor embedded low temperature co-fired ceramic substrate using the same. The multi-layer ceramic capacitor embedded low temperature co-fired ceramic substrate is sinterable at a low temperature while showing a high dielectric constant. The glass composition includes a composition component expressed by a composition formula of aBi2O3-bB2O3-cSiO2-dBaO-eTiO2, where a+b+c+d+e=100, and a, b, c, d, and e are 40?a?89, 10?b?50, 1?c?20, 0?d?10, and 0?e?10, respectively.Type: GrantFiled: November 14, 2008Date of Patent: January 10, 2012Assignee: Samsung Electro-Mechanics Co. Ltd.Inventors: Ho Sung Choo, Jong Myeon Lee, Eun Tae Park, Myung Whun Chang, Soo Hyun Lyoo, Beom Joon Cho
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Patent number: 8058787Abstract: The present invention provides a field emitter electrode and a method for fabricating the same. The method comprises the steps of mixing a carbonizable polymer, carbon nanotubes and a solvent to prepare a carbon nanotube-containing polymer solution, electrospinning (or electrostatic spinning) the polymer solution to form a nanofiber web layer on a substrate, stabilizing the nanofiber web layer such that the polymer present in the nanofiber web layer is crosslinked, and carbonizing the nanofiber web layer such that the crosslinked polymer is converted to a carbon fiber.Type: GrantFiled: September 23, 2008Date of Patent: November 15, 2011Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Seung Hyun Ra, Kay Hyeok An, Young Hee Lee, Jong Myeon Lee
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Patent number: 7994084Abstract: Provided are a dielectric composition and a multi-layer ceramic capacitor embedded low temperature co-fired ceramic substrate using the same. The dielectric composition includes a main component, BaTiO3 of about 80 wt % or more, and an accessory component, CuBi2O4 and ZnO—B2O3—SiO2-based glass of about 20 wt % or less.Type: GrantFiled: November 26, 2008Date of Patent: August 9, 2011Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Soo Hyun Lyoo, Jong Myeon Lee, Ho Sung Choo, Min Ji Ko, Beom Joon Cho, Myung Whun Chang
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Patent number: 7951446Abstract: There is provided a hard-to-sinter constraining green sheet and a method of manufacturing a multilayer ceramic substrate using the same. The hard-to-sinter constraining green sheet disposed at least one of top and bottom surfaces of a non-sintered multi-layer ceramic substrate, the hard-to-sinter constraining green sheet including: a first constraining layer having a surface to be positioned on the multi-layer ceramic substrate, the first constraining layer including a first organic binder and a first inorganic powder having a spherical shape or a quasi-spherical shape; and a second constraining layer bonded to a top surface of the first constraining layer and including a second organic binder and a second inorganic powder having a flake shape, the second constraining layer having a powder packing density lower than that of the first constraining layer.Type: GrantFiled: November 5, 2008Date of Patent: May 31, 2011Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Beom Joon Cho, Jong Myeon Lee, Myung Whun Chang